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Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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  2/2008 - 9

Static Test Compaction for VLSI Tests An Evolutionary Approach

LOGOFATU, D. See more information about LOGOFATU, D. on SCOPUS See more information about LOGOFATU, D. on IEEExplore See more information about LOGOFATU, D. on Web of Science
 
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Download PDF pdficon (929 KB) | Citation | Downloads: 1,325 | Views: 5,225

Author keywords
evolutionary algorithms, digital circuit design, test compaction problem, set coverage problem, test generation, greedy algorithm, optimization, don't care value

References keywords
algorithms(11), drechsler(6), test(5), logofatu(5), genetic(5), vlsi(4), systems(4), problems(4), design(4), data(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2008-06-02
Volume 8, Issue 2, Year 2008, On page(s): 49 - 53
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2008.02009
Web of Science Accession Number: 000264815000009
SCOPUS ID: 77955593111

Abstract
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The test compaction is one of most important requirement regarding the large scale integration (LSI) testing. The overall cost of a VLSI circuit's testing depends on the length of its test sequence; therefore the reduction of this sequence, keeping the coverage of error prone points, will lead to a reduction of used resources in the testing process. This problem is NP-complete. Consequently an optimal algorithm doesn't have applicability in practice. In this paper we describe an evolutionary algorithm (GATC) and we introduce the term of compaction factor (cf), i.e. the expected percentage of compacted test sequence. GATC provides in praxis better results than a greedy approach (GR) for many configurations. This improvement comes from the freedom to merge randomly pairs of compatible tests for different candidates to solution and keeps the ones with more Don't care positions, thus there is an increased probability to find for them compatible tests in the next stage. Also the C++ implementation was optimized, using compact data structures and the Standard Template Library.


References | Cited By  «-- Click to see who has cited this paper

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[CrossRef] [Web of Science Times Cited 172] [SCOPUS Times Cited 232]


[2] Cardei, M., Wu, J., "Energy-efficient coverage problems in wireless ad-hoc sensor networks," Computer Communications, v. 29 n. 4, pp. 415-420, 2006.
[CrossRef] [Web of Science Times Cited 368] [SCOPUS Times Cited 507]


[3] Cormen, T. H., Leiserson, C. E., Rivest, R. L., Stein, C., "Introduction to Algorithms", 2nd Edition, MIT Press, 2001.

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[7] Drechsler, N., Drechsler, R., "Exploiting don't cares during data sequencing using genetic algorithms", In ASP Design Automation Conf., pp. 303-306, 1999.

[8] Drechsler, R., Drechsler, N., "Evolutionary Algorithms for Embedded System Design", Kluwer Acadmeic Publisher, 2002.
[CrossRef]


[9] Drechsler, R., "Evolutionary Algorithms for VLSI CAD", Kluwer Academic Publisher, 1998.

[10] El-Maleh, A., Osais, Y., "Test vector decomposition based static compaction algorithms for combinatorial circuits", ACM Trans. Des. Autom. Electron. Syst., vol. 8, pp. 430-459, 2003.
[CrossRef] [Web of Science Times Cited 42] [SCOPUS Times Cited 48]


[11] Feige, U., "A Thereshold of lnn for Approximating Set Cover", Journal of the ACM (JACM), v. 45 n. 4, pp. 634-652, 1998.
[CrossRef] [Web of Science Times Cited 1848] [SCOPUS Times Cited 2295]


[12] Garey, M. R., Johnson, D. S., "Computers and Intractability - A Guide to NP-Completeness", Freeman, San Francisco, 1979.

[13] Guo, R., Pomeranz, I., Reddy, S. M., "On improving static test compaction for sequential circuits", VLSI Design, Fourteenth International Conference, pp. 111-116, 2001.

[14] Higami, Y., Kajihara, S., Pomeranz, I., Kobayashi, S., Takamatsu, Y., "On Finding Don't Cares in Test Sequences for Sequential Circuits", IEICE Transactions on Information and Systems, v. E89 n. 11, 2006.
[CrossRef] [Web of Science Times Cited 4]


[15] Hochbaum, D., S., Pathria, A., "Analysis of the greedy approach in problems of maximum k-coverage", Naval Research Logistics, v. 45 n.6, pp. 615-627, 1998.
[CrossRef] [SCOPUS Times Cited 157]


[16] Holland, J. H., "Adaption in Natural and Artificial Systems", The University of Michigan Press, Ann Arbor, MI, 1975.

[17] Ibrahim, W., El-Chouemi, A., El-Sayed, H., "Novel Heuristic and Genetic Algorithms for the VLSI Test Coverage Problem", Computer Systems and Applications, IEEE International Conference, pp. 402-408, 2006.

[18] Karp, M. R., "Reductibility Among Combinatorial Problems", Complexity of Computer Computations (Symposium Proceedings), Plenum Press, 1972.

[19] Logofatu, D., "Algorithmen und Problemlösungen mit C++", Vieweg-Verlag, 2006.

[20] Logofatu, D., "Drechsler, R., Efficient Evolutionary Approaches for the Data Ordering Problem with Inversion", 3rd European Workshop on Hardware Optimisation Techniques (EvoHOT), LNCS 3907, pp. 320-331, Budapest, 2006.

[21] Logofatu, D., "Greedy Approaches for the Data Ordering Problem with Inversion", Proceedings of ROSYCS, Romanian Symposium on Computer Science, pp. 65-80, Iasi, 2006.

[22] Logofatu, D., "Algoritmi fundamentali in C++. Aplicaþii", Editura Polirom, Iasi, 2007.

[23] Logofatu, D., "Algoritmi fundamentali in Java. Aplicaþii", Editura Polirom, Iasi, 2007.

[24] Lund, C., Yannakakis, M., "On the hardness of approximating minimization problems", Journal of the ACM (JACM), v. 41 n. 5, pp. 960-981, 1994.
[CrossRef] [Web of Science Times Cited 490] [SCOPUS Times Cited 611]


[25] Mazumder, P., Rudnick, E., "Genetic Algorithms for VLSI Design, Layout & Test Automation", Prentice Hall, 1998.

[26] Michalewicz, Z., "Genetic Algorithms + Data Structures = Evolution Program", 3rd ed. Springer-Verlag, Berlin Heidelberg New York (1996).

[27] Murray, A., T., Kim, K., K., Davis, J., W., Machiraju, R., Parent, R., "Coverage optimization to support security monitoring, Computers, Environment and Urban Systems", vol. 31, n. 2, pp 133-147, 2007.
[CrossRef] [Web of Science Times Cited 123] [SCOPUS Times Cited 154]


References Weight

Web of Science® Citations for all references: 3,047 TCR
SCOPUS® Citations for all references: 4,004 TCR

Web of Science® Average Citations per reference: 113 ACR
SCOPUS® Average Citations per reference: 148 ACR

TCR = Total Citations for References / ACR = Average Citations per Reference

We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more

Citations for references updated on 2024-12-01 10:16 in 65 seconds.




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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania


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