| 3/2013 - 19 | View TOC | « Previous Article | Next Article » |
Threads Pipelining on the CellBE SystemsTANASE, C. A.   , GAITAN, V. G. |
View the paper record and citations in  |
| Click to see author's profile in SCOPUS, IEEE Xplore, Web of Science |
Download PDF  (909 KB) | Citation | Downloads: 823 | Views: 3,133 |
Author keywords
Cell B.E., threads, PPU-SPU pipeline communication, flip-flop buffer, three level pipeline transfer
References keywords
parallel(13), cell(11), processing(5), engine(5), broadband(5), parallelism(4), computing(4)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2013-08-31
Volume 13, Issue 3, Year 2013, On page(s): 121 - 126
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2013.03019
Web of Science Accession Number: 000326321600019
SCOPUS ID: 84884919716
Abstract
This article aims to describe a model to accelerate the execution of a parallel algorithm implemented on a Cell B.E. processor. The algorithm implements a technique of finding a moving target in a maze with dynamic architecture, using another technique of pipelining the data transfers between the PPU and SPU threads. We have shown that by using the pipelining technique, we can achieve an improvement of the computing time (around 40%). It can be also seen that the pipelining technique with one SPU is about as good as the parallel technique with four SPUs. |
| References | | | Cited By «-- Click to see who has cited this paper |
| [1] Drago Ignjatovic, Arayeh Norouzi, Owojaiye Oluwaseun "Parallel Implementation of Lee Algorithm", EE8218: Parallel Computing, April 2010.
[2] Sandeep Koranne, "Practical Computing on Cell Broadband Engine", Springer Science, Springer Dordrecht Heidelberg London New York, 2009. [CrossRef] [3] I-Ling Yen, Rumi M Dubash, Farokh B. Bastani, "Stategies for Mapping Lee's Maze Routing Algorithm onto Parallel Architectures", Proceedings of the 7th International Parallel Processing Symposium, pp. 672 - 679, 1993. [CrossRef] [4] Jianjiang Ceng, Stefan Kraemer, "Maze Router with Lee Algorithm", Institute for Integrated Signal Processing Systems, Rwthaachen University, 2007. [5] W.-K. Liao, A. Choudhary, D.Weiner, and P. Varshney "Performance evaluation of a parallel pipeline computational model for space-time adaptive processing" J. Supercomput., 31(2):137-160, 2004. [CrossRef] [Web of Science Times Cited 13] [6] A. Navarro, R. Asenjo, S. Tabik, and C. Cascaval. "Load Balancing using Work-Stealing for Pipeline Parallelism in Emerging Applications" Technical report, Dept. of Computer Architecture. Univ. of Malaga, 2009. [7] E. Raman, G. Ottoni, A. Raman, M. J. Bridges, and D. I. August. "Parallel-stage decoupled software pipelining" In CGO '08: 6th Itnl Symp on Code generation and optimization, pp. 4-13, 2008. [CrossRef] [8] C. Bienia, S. Kumar, J. P. Singh, and K. Li "The PARSEC benchmark suite: Characterization and architectural implications" Princeton University Technical Report TR-811-08, pp. 1-21, January 2008 [9] N. Vachharajani, R. Rangan, E. Raman, M. J. Bridges, G. Ottoni, and D. I. August "Speculative decoupled software pipelining" Proceedings of the 16th International Conference on Parallel Architecture and Compilation Techniques, pp. 49-59, 2007. [CrossRef] [10] W. Thies, V. Chandrasekhar, and S. Amarasinghe "A practical approach to exploiting coarse-grained pipeline parallelism in C programs "In MICRO '07, pp. 356-369, 2007. [11] Fayez Gebali, "Algorithms and Parallel Computing", Published by John Wiley & Sons, 2011. [CrossRef] [12] András Vajda, "Programming Many-Core Chips", Springer Science+Business Media, 2011. [13] Matthew Scarpino, "Programming the Cell Processor: For Games, Graphics, and Computation", Springer Science, Upper Saddle River, New Jersey 07458 USA, 2008. [14] Cell Broadband Engine Programming Handbook, IBM, Sony, Toshiba Corp. 2006-2008. [15] Tong Chen, Zehra Sura, Kathryn O'Brien, and John K. O'Brien, "Optimizing the Use of Static Buffers for DMA on a CELL Chip", Languages and Compilers for Parallel Computing, 19th International Workshop, New Orleans, LA, USA, November 2-4, pp. 314-329, 2006. [16] Blagojevic F, Feng X, Cameron K, Nikolopoulos DS, "Modeling multi-grain parallelism on heterogeneous multicore processors: A case study of the Cell BE", HiPEAC'08, Goteborg, Sweden, 2008. [17] E. Ayguad'e, N. Copty, A. Duran, J. Hoeflinger, Y. Lin, F. Massaioli, E. Su, P. Unnikrishnan, and G. Zhang, "A Proposal for Task Parallelism in OpenMP", Third International Workshop on OpenMP (IWOMP), 2007. [18] IBM Cell Broadband Engine Software Development Kit. [Online] Available: Temporary on-line reference link removed - see the PDF document [19] K.-Y. Hsieh, C.-H. Lai, S.-H. Lai, J. K. Lee, "Parallelization of Belief Propagation on Cell Processors for Stereo Vision," ACM Trans. Embed. Comput. Syst., vol. 11S, no. 1, pp. 13:1-13:15, June 2012. [CrossRef] [Web of Science Times Cited 6] [20] Y. Song, A. Akoglu, "Parallel Implementation of the Irregular Terrain Model (ITM) for Radio Transmission Loss Prediction Using GPU and Cell BE Processors," IEEE Transactions on Parallel and Distributed Systems, vol. 22, no. 8, pp. 1276-1283, Aug. 2011. [CrossRef] [21] L. Ismail, D. Guerchi, "Performance Evaluation of Convolution on the Cell Broadband Engine Processor," IEEE Transactions on Parallel and Distributed Systems, vol. 22, no. 2, pp. 337-351, Feb. 2011. [CrossRef] [Web of Science Times Cited 12] [22] A. Shahbahrami, T. Pham, K. Bertels, "Parallel implementation of Gray Level Co-occurrence Matrices and Haralick texture features on cell architecture", The Journal of Supercomputing, vol. 59, no. 3, pp. 1455-1477, Mar. 2012. [CrossRef] [Web of Science Times Cited 24] [23] Ungurean, Ioan; Gaitan, Nicoleta-Cristina, "Speech Analysis for Medical Predictions based on cell Broadband Engine", 2012 Proceedings of the 20th European Signal Processing Conference (EUSIPCO), 20th European Signal Processing Conference (EUSIPCO) Location: Bucharest, ROMANIA Date: AUG 27-31, pp: 1733-1736, 2012. Web of Science® Citations for all references: 55 TCR SCOPUS® Citations for all references: 0 Web of Science® Average Citations per reference: 2 ACR SCOPUS® Average Citations per reference: 0 TCR = Total Citations for References / ACR = Average Citations per Reference We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more Citations for references updated on 2024-04-21 14:49 in 58 seconds. Note1: Web of Science® is a registered trademark of Clarivate Analytics. Note2: SCOPUS® is a registered trademark of Elsevier B.V. Disclaimer: All queries to the respective databases were made by using the DOI record of every reference (where available). Due to technical problems beyond our control, the information is not always accurate. Please use the CrossRef link to visit the respective publisher site. |
Copyright ©2001-2024
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.
Permission for other use: The copyright owner's consent does not extend to copying for general distribution, for promotion, for creating new works, or for resale. Specific written permission must be obtained from the Editor for such copying. Direct linking to files hosted on this website is strictly prohibited.
Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.
Permission for other use: The copyright owner's consent does not extend to copying for general distribution, for promotion, for creating new works, or for resale. Specific written permission must be obtained from the Editor for such copying. Direct linking to files hosted on this website is strictly prohibited.
Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.
