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Floating Point Multiple-Precision Fused Multiply Add Architecture for Deep Learning Computation on Artix 7 FPGA BoardVINOTHENI, M. S.   , JAWAHAR SENTHIL KUMAR, V. |
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Author keywords
field programmable gate arrays, architecture, high performance computing, parallel processing, very large scale integration
References keywords
point(23), floating(23), precision(15), systems(12), multiply(10), design(10), unit(9), efficient(9), arithmetic(7), multiple(6)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2024-11-30
Volume 24, Issue 4, Year 2024, On page(s): 93 - 102
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2024.04010
Abstract
Deep learning (DL) has become a transformative force in today's world revolutionizing industries. However, its success relies on high-precision arithmetic units, leading to the requirement of powerful high precision arithmetic design. Hence, this research proposes the multiple precision fused multiply add (MPFMA) architecture for profound computing-based applications. The proposed MPFMA architecture is capable of performing momentous tasks in every single clock cycle such as eight consecutive numbers of half precision (HP) operations, four numbers of concurrent single precision (SP) operations, two simultaneous double precision (DP) operations and single quadruple precision (QP) operations. The propounded architecture is implemented using Xilinx Vivado 2022.2 on Artix-7 FPGA Basys 3 board that demonstrates the functionality and attainment. From the observed results, it is inferred that the proposed framework offers 50% area curtail with the conventional FMA architecture, while still meeting the precision requirements for deep learning tasks. With an astoundingly low error rate of 0.013 % and an amazing accuracy rate of 99.987 %, the MPFMA in deep learning hardware not only enhances model performance but also contributes to energy conservation, making DL systems more sustainable and promising for the future of smart intelligence applications. |
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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.
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Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.
