| 4/2020 - 3 |
Fault Tolerant Distributed Python Software Transactional MemoryPOPOVIC, M.   , BASICEVIC, I. , DJUKIC, M. , POPOVIC, M. |
Extra paper information in    |
| Click to see author's profile in SCOPUS, IEEE Xplore, Web of Science |
Download PDF  (1,217 KB) | Citation | Downloads: 968 | Views: 2,103 |
Author keywords
Internet of Things, embedded software, distributed computing, parallel programming, fault tolerance
References keywords
memory(29), transactional(28), distributed(23), software(18), systems(10), computing(9), kordic(8), python(7), romano(5), architecture(5)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2020-11-30
Volume 20, Issue 4, Year 2020, On page(s): 19 - 28
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2020.04003
Web of Science Accession Number: 000594393400003
SCOPUS ID: 85098215196
Abstract
Much of the previous research has been done on distributed software transactional memories targeting data centers in Internet clouds, which resulted in nondeterministic and nonrealtime middleware solutions mainly written in Java and C++. On the other hand, embedded systems based on the Internet of Things at the edge of the Internet, such as smart homes, cars, etc., need to operate in realtime, and should, therefore, be deterministic. In order to be smart, these systems use machine learning, and nowadays Python is becoming a leading language in this venue, too. This is the first paper that presents a distributed software transactional memory that is at the same time: (i) fault tolerant, (ii) deterministic, (iii) based on Python, and (iv) extended from a formally verified root. The presented solution consists of a pair of master-slave transaction coordinators and a set of replicated data servers and targets small-to-medium edge networks. Besides intelligent embedded systems, based on the Internet of Things, it can be also used in a wide range of application domains, from SCADA systems to large-scale simulations. The experimental results, presented in the paper, show a superlinear growth of the system throughput as the workload changes from write-only to read-only. |
| References | | | Cited By «-- Click to see who has cited this paper |
| [1] M. Herlihy, J. E. B. Moss, "Transactional memory: architectural support for lockfree data structures," in Proc. 20th Annual International Symposium on Computer Architecture, pp. 289-300, 1993. [CrossRef] [2] J. R. Goodman, "Using cache memory to reduce processor-memory traffic," in Proc. of the 12th International Symposium on Computer Architecture, pp. 124-131, 1983. [CrossRef] [3] N. Shavit, D. Touitou, "Software transactional memory," in Proc. 14th ACM Symposium on Principles of Distributed Computing, pp. 204-213, 1995. [CrossRef] [SCOPUS Times Cited 750] [4] K. Manassiev, M. Mihailescu, and C. Amza, "Exploiting distributed version concurrency in a transactional memory cluster, " in Proc. 11th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, pp. 198-208, 2006. [CrossRef] [SCOPUS Times Cited 91] [5] C. Kotselidis, M. Ansari, K. Jarvis, M. Lujan, C. C. Kirkham, I. Watson, "DiSTM: A software transactional memory framework for clusters," in Proc. 37th International Conference on Parallel Processing, pp. 51-58, 2008. [CrossRef] [SCOPUS Times Cited 78] [6] C. Kotselidis, M. Ansari, K. Jarvis, M. Lujan, C. C. Kirkham, I. Watson, "Investigating software transactional memory on clusters," in Proc. 22nd International Parallel and Distributed Processing Symposium, pp. 1-6, 2008. [CrossRef] [SCOPUS Times Cited 12] [7] M. Couceiro, P. Romano, N. Carvalho, L. Rodrigues, "D2STM: Dependable distributed software transactional memory," in Proc. 15th Pacific Rim International Symposium on Dependable Computing, pp. 307-313, 2009. [CrossRef] [Web of Science Times Cited 38] [SCOPUS Times Cited 88] [8] J. Cachopo, A. Rito-Silva, "Versioned boxes as the basis for memory transactions," Science of Computer Programming, vol. 63, no. 2, pp. 172-185, 2006. [CrossRef] [Web of Science Times Cited 61] [SCOPUS Times Cited 94] [9] J. Cachopo, A. Rito-Silva, "Combining software transactional memory with a domain modeling language to simplify web application development," in Proc. 6th International Conference on Web Engineering, pp. 297-304, 2006. [CrossRef] [SCOPUS Times Cited 14] [10] P. Romano, N. Carvalho, L. Rodrigues, "Towards distributed software transactional memory systems," in Proc. 2nd Workshop on Large-Scale Distributed Systems and Middleware, pp. 1-4, 2008. [CrossRef] [SCOPUS Times Cited 3] [11] N. Carvalho, J. Cachopo, L. Rodrigues, A. Rito-Silva, "Versioned transactional shared memory for the FenixEDU web application," in Proc. 2nd Workshop on Dependable Distributed Data Management, pp. 15-18, 2008. [CrossRef] [SCOPUS Times Cited 19] [12] R. L. Bocchino, V. S. Adve, B. L. Chamberlain, "Software transactional memory for large scale clusters," in Proc. 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, pp. 247-258, 2008. [CrossRef] [Web of Science Times Cited 56] [SCOPUS Times Cited 102] [13] J. Kim, B. Ravindran, "Scheduling transactions in replicated distributed software transactional memory," in Proc. 13th IEEE/ACM Int'l Symposium on Cluster, Cloud and Grid Computing, pp. 227-234, 2013. [CrossRef] [Web of Science Times Cited 11] [SCOPUS Times Cited 15] [14] P. Romano, R. Palmieri, F. Quaglia, N. Carvalho, L. Rodrigues, "On speculative replication of transactional systems," Journal of Computer and System Sciences, vol. 80, no. 1, pp. 257-276, 2014. [CrossRef] [Web of Science Times Cited 16] [SCOPUS Times Cited 21] [15] M. M. Saad, B. Ravindran, "Snake: Control flow distributed software transactional memory," in Proc. Stabilization, Safety, and Security of Distributed Systems, pp. 238-252, 2011. [CrossRef] [SCOPUS Times Cited 13] [16] M. Herlihy, Y. Sun, "Distributed transactional memory for metric-space networks," Distributed Computing, vol. 20, no. 3, pp. 195-208, 2007. [CrossRef] [Web of Science Times Cited 51] [SCOPUS Times Cited 67] [17] G. Sharma and C. Busch, "Distributed transactional memory for general networks," Distributed Computing, vol. 27, no. 5, pp. 329-362, 2014. [CrossRef] [Web of Science Times Cited 19] [SCOPUS Times Cited 23] [18] B. Zhang, B. Ravindran, R. Palmieri, "Distributed transactional contention management as the traveling salesman problem," in Proc. Structural Information and Communication Complexity, pp. 54-67, 2014. [CrossRef] [SCOPUS Times Cited 13] [19] C. Busch, M. Herlihy, M. Popovic, G. Sharma, "Fast scheduling in distributed transactional memory," in Proc. Symposium on Parallelism in Algorithms and Architectures, pp. 173-182, 2017. [CrossRef] [Web of Science Times Cited 8] [SCOPUS Times Cited 8] [20] C. Busch, M. Herlihy, M. Popovic, G. Sharma, "Time-communication impossibility results for distributed transactional memory," Distributed Computing, vol. 31, no. 6, pp. 471-487, 2018. [CrossRef] [Web of Science Times Cited 9] [SCOPUS Times Cited 12] [21] D. Hendler, A. Naiman, S. Peluso, F. Quaglia, P. Romano, A. Suissa, "Exploiting locality in lease-based replicated transactional memory via task migration," in Proc. International Symposium on Distributed Computing, pp. 121-133, 2013. [CrossRef] [SCOPUS Times Cited 17] [22] R. Palmieri, S. Peluso, B. Ravindran, "Transaction execution models in partially replicated transactional memory: The case for data-flow and control-flow," in: R. Guerraoui, P. Romano (Eds.) Transactional Memory - Foundations, Algorithms, Tools, and Applications, LNCS, vol. 8913, Springer, pp. 341-366. 2015. [CrossRef] [SCOPUS Times Cited 9] [23] S. Bagchi, M.-B. Siddiqui, P. Wood, H. Zhang, "Dependability in Edge Computing," Communications of ACM, vol. 63, no. 1, pp. 59-66, 2020. [CrossRef] [Web of Science Times Cited 32] [SCOPUS Times Cited 44] [24] K. Gilly, S. Filiposka, A. Mishev "Supporting Location Transparent Services in a Mobile Edge Computing Environment," Advances in Electrical and Computer Engineering, vol. 18, no. 4, pp. 11-22, 2018. [CrossRef] [Full Text] [Web of Science Times Cited 5] [SCOPUS Times Cited 5] [25] M. Popovic, B. Kordic, "PSTM: Python Software Transactional Memory," in Proc. 22nd IEEE Telecommunications Forum, pp. 1106-1109, 2014. [CrossRef] [SCOPUS Times Cited 28] [26] A. Liu, H. Zhu, M. Popovic, S. Xiang, L. Zhang, "Formal Analysis and Verification of the PSTM Architecture Using CSP", The Journal of Systems and Software, vol. 165, 2020. [CrossRef] [Web of Science Times Cited 9] [SCOPUS Times Cited 12] [27] B. Kordic, M. Popovic, S. Ghilezan, "Formal verification of python software transactional memory based on timed automata", Acta Polytechnica Hungarica, Journal of Applied Sciences, vol. 16, no. 7, pp. 197-216, 2019. [CrossRef] [Web of Science Times Cited 4] [SCOPUS Times Cited 8] [28] M. Popovic, M. Popovic, S. Ghilezan, B. Kordic, "Formal verification of python software transactional memory serializability based on the push/pull semantic model," in Proc. 6th Conference on the Engineering of Computer Based Systems, Article No. 6, pp. 1-8, 2019. [CrossRef] [Web of Science Record] [SCOPUS Times Cited 3] [29] M. Popovic, B. Kordic, M. Popovic, I. Basicevic, "Online algorithms for scheduling transactions on python software transactional memory," Serbian Journal of Electrical Engineering, vol. 16, no. 1, pp. 85-104, 2019. [CrossRef] [SCOPUS Times Cited 7] [30] C. Xu, X. Wu, H. Zhu, M. Popovic, âmodeling and verifying transaction scheduling for software transactional memory using CSP," in Proc. 13th Theoretical Aspects of Software Engineering Symposium, pp. 240-247, 2019. [CrossRef] [Web of Science Times Cited 6] [SCOPUS Times Cited 6] [31] M. Popovic, B. Kordic, M. Popovic, I. Basicevic, "A solution of concurrent queue on local and distributed python STM," Telfor Journal, vol. 11, no. 1, pp. 64-69, 2019. [CrossRef] [SCOPUS Times Cited 7] [32] M. Popovic, M. Popovic, B. Kordic, I. Basicevic, "A solution of python distributed stm based on data replication," in Proc. 27th IEEE Telecommunications Forum, pp. 1-4, 2019. [CrossRef] [Web of Science Record] [SCOPUS Times Cited 4] [33] M. van Steen, A.S. Tanenbaum, Distributed Systems, 3rd edition, Published by Maarten van Steen, pp. 355-421, 2017. [34] W. Vogels, "Eventually consistent," Communications of the ACM, vol. 52, no. 1, pp. 40-44, 2009. [CrossRef] [Web of Science Times Cited 356] [SCOPUS Times Cited 564] [35] D.J. Abadi, J.M. Faleiro, "An overview of deterministic database systems," Communications of the ACM, vol. 81, no. 9, pp. 78-88, 2018. [CrossRef] [Web of Science Times Cited 17] [SCOPUS Times Cited 25] [36] M. Popovic, M. Popovic, S. Ghilezan, B. Kordic, "Formal Verification of local and distributed python software transactional memory," Revue Roumaine des Sciences Techniques. Ser. Electrotechnique et Energetique, vol. 64, no. 4, pp. 423-428, 2019. [37] E. Nan, U. Radosavac, M. Matic, I. Stefanovic, I. Papp and M. Antic, "One solution for voice enabled smart home automation system," in Proc. IEEE 7th International Conference on Consumer Electronics - Berlin, pp. 132-133, 2017. [CrossRef] [SCOPUS Times Cited 4] [38] E. Nan, U. Radosavac, I. Papp and M. Antic, "Architecture of voice control module for smart home automation cloud," in Proc. IEEE 7th International Conference on Consumer Electronics - Berlin, pp. 97-98, 2017. [CrossRef] [SCOPUS Times Cited 3] [39] B. Kordic, M. Popovic, M. Popovic, M. Goldstein, M. Amitay, D. Dayan, "A protein structure prediction program architecture based on a software transactional memory," in Proc. 6th Conference on the Engineering of Computer Based Systems, Article No. 1, pp. 1-9, 2019. [CrossRef] [Web of Science Times Cited 1] [SCOPUS Times Cited 2] [40] P. Hunt, M. Konar, F. P. Junqueira, B. Reed, "ZooKeeper: wait-free coordination for internet-scale systems," in Proc. of the 2010 USENIX conference on USENIX annual technical conference, pp. 145-158, 2010. [41] L. Martinovic, D. Capko, A. Erdeljan, "Load balancing of large distribution network model calculations," Advances in Electrical and Computer Engineering, vol. 17, no. 4, pp. 11-18, 2017. [CrossRef] [Full Text] [Web of Science Times Cited 2] [SCOPUS Times Cited 2] [42] S. Gilbert, N. Lynch, "Brewer's conjecture and the feasibility of consistent, available, partition-tolerant web services," ACM SIGACT News, vol. 33, no. 2, pp. 51-59, 2002. [CrossRef] Web of Science® Citations for all references: 701 TCR SCOPUS® Citations for all references: 2,173 TCR Web of Science® Average Citations per reference: 16 ACR SCOPUS® Average Citations per reference: 51 ACR TCR = Total Citations for References / ACR = Average Citations per Reference We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more Citations for references updated on 2024-12-19 18:05 in 269 seconds. Note1: Web of Science® is a registered trademark of Clarivate Analytics. Note2: SCOPUS® is a registered trademark of Elsevier B.V. Disclaimer: All queries to the respective databases were made by using the DOI record of every reference (where available). Due to technical problems beyond our control, the information is not always accurate. Please use the CrossRef link to visit the respective publisher site. |
Copyright ©2001-2024
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.
Permission for other use: The copyright owner's consent does not extend to copying for general distribution, for promotion, for creating new works, or for resale. Specific written permission must be obtained from the Editor for such copying. Direct linking to files hosted on this website is strictly prohibited.
Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.
Permission for other use: The copyright owner's consent does not extend to copying for general distribution, for promotion, for creating new works, or for resale. Specific written permission must be obtained from the Editor for such copying. Direct linking to files hosted on this website is strictly prohibited.
Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.
