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Efficient FPGA Implementation of High-Throughput Mixed Radix Multipath Delay Commutator FFT Processor for MIMO-OFDMDALI, M. , GUESSOUM, A. , GIBSON, R. M. , AMIRA, A. , RAMZAN, N. |
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Author keywords
fast fourier transform, field programmable gate arrays, mimo, ofdm, parallel architecture
References keywords
systems(18), processor(11), ofdm(10), mimo(7), circuits(7), vlsi(6), very(6), tvlsi(6), scale(6), large(6)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2017-02-28
Volume 17, Issue 1, Year 2017, On page(s): 27 - 38
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2017.01005
Web of Science Accession Number: 000396335900005
SCOPUS ID: 85014212241
Abstract
This article presents and evaluates pipelined architecture designs for an improved high-frequency Fast Fourier Transform (FFT) processor implemented on Field Programmable Gate Arrays (FPGA) for Multiple Input Multiple Output Orthogonal Frequency Division Multiplexing (MIMO-OFDM). The architecture presented is a Mixed-Radix Multipath Delay Commutator. The presented parallel architecture utilizes fewer hardware resources compared to Radix-2 architecture, while maintaining simple control and butterfly structures inherent to Radix-2 implementations. The high-frequency design presented allows enhancing system throughput without requiring additional parallel data paths common in other current approaches, the presented design can process two and four independent data streams in parallel and is suitable for scaling to any power of two FFT size N. FPGA implementation of the architecture demonstrated significant resource efficiency and high-throughput in comparison to relevant current approaches within literature. The proposed architecture designs were realized with Xilinx System Generator (XSG) and evaluated on both Virtex-5 and Virtex-7 FPGA devices. Post place and route results demonstrated maximum frequency values over 400 MHz and 470 MHz for Virtex-5 and Virtex-7 FPGA devices respectively. |
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[1] D. Gesbert, M. Shafi, D. Shiu, P.J. Smith, and A. Naguib, "From theory to practice: an overview of MIMO space-time coded wireless systems," IEEE J. Select. Areas Commun., vol. 21, no. 3, pp. 281-302, Apr 2003. [CrossRef] [Web of Science Times Cited 1321] [SCOPUS Times Cited 1870] [2] J. A. C. Bingham, "Multicarrier modulation for data transmission: an idea whose time has come," IEEE Communications Magazine, vol. 28, pp. 5-14, May 1990. [CrossRef] [Web of Science Times Cited 1947] [SCOPUS Times Cited 2770] [3] H. Sampath, S. Talwar, J. Tellado, V. Erceg, A. Paulraj, "A fourth generation MIMO-OFDM: broadband wireless system: Design, performance, and field trial results," Communications Magazine, IEEE, vol. 40, no. 9, pp. 143-149, Sep. 2002. [CrossRef] [Web of Science Times Cited 403] [SCOPUS Times Cited 560] [4] Y. G. Li, J. H. Winters, N. R. Sollenberger, "MIMO-OFDM for wireless communications: Signal detection with enhanced channel estimation," IEEE Trans. Communications, vol. 50, no. 9, pp. 1471-1477, Sep. 2002. [CrossRef] [Web of Science Times Cited 275] [SCOPUS Times Cited 368] [5] H. Y. Chen, J. N. Lin, H. S. Hu, S. J. Jou, "STBC-OFDM downlink baseband receiver for mobile WMAN," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 21,no. 1, pp. 43-54, Jan 2013. [CrossRef] [Web of Science Times Cited 7] [SCOPUS Times Cited 9] [6] IEEE 802.16 Working Group, "IEEE standard for local and metropolitan area networks. Part 16: Air interface for fixed broadband wireless access systems," IEEE Standard 802.16e-2005, 2006. [CrossRef] [7] Y. W. Lin, C. Y. Lee, "Design of an FFT/IFFT processor for MIMO OFDM systems," IEEE Trans. on Circuits and Systems I, vol. 54, no. 4, pp. 807-815, Apr. 2007. [CrossRef] [Web of Science Times Cited 87] [SCOPUS Times Cited 122] [8] B. Fu, P. Ampadu, "An area efficient FFT/IFFT processor for MIMO OFDM WLAN 802.11n," Journal of Signal Processing Systems, Springer, vol. 56, no. 1, pp. 59-68, Jul. 2009. [CrossRef] [Web of Science Times Cited 26] [SCOPUS Times Cited 30] [9] K. J. Yang, S. H. Tsai, , G. C. H. Chuang, "MDC FFT/IFFT Processor With Variable Length for MIMO-OFDM Systems," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 4 , pp. 720-731, Apr. 2013. [CrossRef] [Web of Science Times Cited 83] [SCOPUS Times Cited 105] [10] S. N. Tang, C. H. , Liao, T. Y. Chang, "An area- and energy-efficient multimedia FFT processor for WPAN/WLAN/WMAN systems," IEEE J. of Solid-State Circuits, vol. 47, no. 6, pp. 1419-1435, Jun. 2012. [CrossRef] [Web of Science Times Cited 55] [SCOPUS Times Cited 78] [11] S. N. Tang, J. W. Tsai, T. Y. Chang, "A 2.4 GS/s FFT processor for OFDM based WPAN applications," IEEE Trans. on Circuits and Systems II: Express Briefs, vol. 57, no. 6, pp. 451-455, Jun. 2010. [CrossRef] [Web of Science Times Cited 97] [SCOPUS Times Cited 113] [12] C. Wang, Y. Yan, X. Fu, "A High-Throughput Low-Complexity Radix-24-2²-2³ FFT/IFFT Processor With Parallel and Normal Input/Output Order for IEEE 802.11ad Systems," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 23, no. 11, pp. 2728-2732, Nov. 2015. [CrossRef] [Web of Science Times Cited 13] [SCOPUS Times Cited 21] [13] P. Y. Tsai, C. W. Chen, M. Y. Huang, "Automatic IP generation of FFT/IFFT processors with word-length optimization for MIMO-OFDM systems," EURASIP J. of Advances in Signal Processing, vol. 2011, no. 1, pp. 1-15, Jan. 2011. [CrossRef] [Web of Science Times Cited 6] [SCOPUS Times Cited 11] [14] Y. W. Lin, H. Y. Liu, C. Y. Lee, "A 1-GS/s FFT/IFFT processor for UWB applications," IEEE J. of Solid-State Circuits, 2005, vol. 40, no. 8, pp. 1726-1735, Aug. 2005. [CrossRef] [Web of Science Times Cited 148] [SCOPUS Times Cited 203] [15] Y. T. Lin, P. Y. Tsai, T. D. Chiueh, "Low-power variable-length fast Fourier transform processor," in IEE Proc. Computers and Digital Techniques, vol. 152, no. 4, pp. 499-506, Jul. 2005. [CrossRef] [Web of Science Times Cited 45] [SCOPUS Times Cited 85] [16] S. He, M. Torkelson, "A new approach to pipeline FFT processor," in Proc. International Parallel Processing Symposium (IPPS '96), Washington, DC, Apr. 1996, pp. 766-770. [CrossRef] [17] S. He, M. Torkelson, "Designing pipeline FFT processor for OFDM (de)modulation," in Proc. International Signals, Systems, and Electronics Symposium (ISSSE 98), Pisa, Sep. 1998, pp. 257- 262. [CrossRef] [Web of Science Times Cited 172] [18] P. P. Boopal, M. Garrido, O. Gustafsson, "A reconfigurable FFT architecture for variable-length and multi-streaming OFDM standards," in Proc. IEEE International Symposium on Circuits and Systems (ISCAS 2013), Beijing, May 2013, pp. 2066-2070. [CrossRef] [SCOPUS Times Cited 20] [19] E. E. Swartzlander, W. K. W. Young, S. J. Joseph, "A radix-4 delay commutator for fast Fourier transform processor implementation," IEEE J. of Solid-State Circuits, vol. 19, no. 5, pp. 702-709, Oct. 1984. [CrossRef] [Web of Science Times Cited 62] [SCOPUS Times Cited 93] [20] M. Ayinala, M. Brown, K. K. Parhi, "Pipelined parallel FFT architectures via folding transformation," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 20, no. 6, pp. 1068-1081, Jun. 2012. [CrossRef] [Web of Science Times Cited 122] [SCOPUS Times Cited 166] [21] M. Garrido, J. G. Rajal, M. A.. Sánchez, O. Gustafsson, "Pipelined Radix-2k Feedforward FFT Architectures," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 1, pp. 23-32, Jan. 2013. [CrossRef] [Web of Science Times Cited 136] [SCOPUS Times Cited 192] [22] M. Garrido, M. Acevedo, A.. Ehliar, O. Gustafsson, "Challenging the limits of FFT performance on FPGAs," in Proc. IEEE International Symposium on Integrated Circuits (ISIC), Singapore, Dec. 2014, pp. 172-175. [CrossRef] [SCOPUS Times Cited 31] [23] Z. Wang, X. Liu, B. He, F. Yu, "A Combined SDC-SDF Architecture for Normal I/O Pipelined Radix-2 FFT," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 23, no. 5, pp. 793-977, May 2015. [CrossRef] [Web of Science Times Cited 44] [SCOPUS Times Cited 62] [24] S. Uzun, A. Amira, A. Bouridane, "FPGA implementations of fast Fourier transforms for real-time signal and image processing," in IET Proc. in Vision, Image and Signal Processing, vol. 152, no. 3, pp. 283-296, Jun. 2005. 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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
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