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Conceptual Implementation of Sample Rate Convertors for DACsANTONESEI, G. , TURCU, C. , GRAUR, A. |
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Author keywords
DAC, CIC, mobile phone audio subsystem, multirate filtering, sample rate converter
References keywords
No relevant keywords could be extracted from the references.
About this article
Date of Publication: 2010-05-31
Volume 10, Issue 2, Year 2010, On page(s): 53 - 60
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2010.02009
Web of Science Accession Number: 000280312600009
SCOPUS ID: 77954631109
Abstract
One of most common and difficult challenge when creating a single SoC with digital (sub)sections is caused by the various master clock (MCLK) frequencies that each individual IC had originally. There are several methods to solve this, but when constraint by price and power consumption, the design engineers must find the optimum one. The sample rate converters (SRC) are an example of solution that can simplify the architecture in some of these cases. However, even for the SRCs themselves, we need to come up with novel and efficient architectures. This paper presents such an example from mobile phones chips on how to successfully mix on the same silicon, an audio sigma-delta DAC which should support all the standard audio rates using a 13MHz MCLK frequency imposed by the RF section incorporated inside the same chip. The document will go from showing the top-level digital signal processing down to the actual hardware implementation. |
References | | | Cited By «-- Click to see who has cited this paper |
[1] L. Bening, H. Foster, "Principles of verifiable RTL design : a functional coding style supporting verification processes in Verilog", 2nd edition, Kluwer Academic Publishers Norwell, MA, USA, 2001. [PermaLink]
[2] G. Antonesei, C. Turcu, A. Graur, "Basic Consideration for Signal Processing Solutions Used in Sigma-delta Based ADC and DAC Converters", Advances in Electrical and Computer Engineering, vol. 10, number 1, [CrossRef] [Full Text] [Web of Science Times Cited 2] [SCOPUS Times Cited 3] [3] P. Schniter, Noble Identities, Available: Temporary on-line reference link removed - see the PDF document [4] G. Antonesei, "Sample Rate Converter For Reducing The Sampling Frequency Of A Signal By A Fractional Number", US Patent 7236110, 2007. Web of Science® Citations for all references: 2 TCR SCOPUS® Citations for all references: 3 TCR Web of Science® Average Citations per reference: 1 ACR SCOPUS® Average Citations per reference: 1 ACR TCR = Total Citations for References / ACR = Average Citations per Reference We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more Citations for references updated on 2024-11-16 01:08 in 9 seconds. Note1: Web of Science® is a registered trademark of Clarivate Analytics. Note2: SCOPUS® is a registered trademark of Elsevier B.V. Disclaimer: All queries to the respective databases were made by using the DOI record of every reference (where available). Due to technical problems beyond our control, the information is not always accurate. Please use the CrossRef link to visit the respective publisher site. |
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
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