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Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
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ROMANIA

Print ISSN: 1582-7445
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WorldCat: 643243560
doi: 10.4316/AECE


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  1/2012 - 7

 HIGHLY CITED PAPER 

Phase-Synchronizer based on gm-C All-Pass Filter Chain

JOVANOVIC, G. S. See more information about JOVANOVIC, G. S. on SCOPUS See more information about JOVANOVIC, G. S. on IEEExplore See more information about JOVANOVIC, G. S. on Web of Science, MITIC, D. B. See more information about  MITIC, D. B. on SCOPUS See more information about  MITIC, D. B. on SCOPUS See more information about MITIC, D. B. on Web of Science, STOJCEV, M. K. See more information about  STOJCEV, M. K. on SCOPUS See more information about  STOJCEV, M. K. on SCOPUS See more information about STOJCEV, M. K. on Web of Science, ANTIC, D. S. See more information about ANTIC, D. S. on SCOPUS See more information about ANTIC, D. S. on SCOPUS See more information about ANTIC, D. S. on Web of Science
 
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Download PDF pdficon (772 KB) | Citation | Downloads: 1,370 | Views: 4,631

Author keywords
RF circuits, all-pass filter, BiCMOS integrated circuits, gm-C filter, phase control, tuned circuits

References keywords
circuits(12), systems(7), state(7), solid(7), cmos(7), pass(5), filter(5), delay(5), analog(5), tuning(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2012-02-28
Volume 12, Issue 1, Year 2012, On page(s): 39 - 44
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2012.01007
Web of Science Accession Number: 000301075000007
SCOPUS ID: 84860702967

Abstract
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Full text preview
The use of analog CMOS circuits at high frequency has gained much attention in the last several years. At the heart of rapid prototyping of these circuits is the concept of using a versatile library of common RF function blocks. The blocks (cells) must be designed to be flexible in terms of drive requirements and loading. This paper presents the results of on-going research in development of phase-synchronizer as common RF function block, used in frequency and phase modulation, frequency synthesis, clock generation recovery, filtering, etc. The proposed circuit is based on series of voltage-controlled all-pass filter as delay chain, and enables phase regulation of analog input signals in wide range. Other characteristics of the input signal, such as amplitude and waveform are not deteriorated. The gm-C voltage-controlled all-pass filter is crucial block of the proposal. The IHP 0.25 um SiGe BiCMOS technology was used for design and verification of the circuit. Simulation results indicate that it is possible to obtain phase regulation in the wide frequency range, from 100 kHz up to 200 MHz.


References | Cited By  «-- Click to see who has cited this paper

[1] David Boerstler, "A Low-Jitter PLL Clock Generator for Microprocessors with Lock Range of 340-612 MHz," IEEE J. of Solid-State Circuits, Vol. 34, No. 4, pp. 513-519, April 1999.
[CrossRef] [Web of Science Times Cited 58] [SCOPUS Times Cited 68]


[2] John Maneatis, "Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques," IEEE J. Solid-State Circuits, vol. 31, no. 11, pp. 1723-1732, November 1996.
[CrossRef] [Web of Science Times Cited 461] [SCOPUS Times Cited 628]


[3] Y. Moon, et al., "An All-Analog Multiphase DLL Using a Replica Delay Line for Wide-Range Operation and Low-Jitter Performance," IEEE J. Solid-State Circuits, vol. 35, no. 3, pp. 377-384, March 2000.
[CrossRef] [Web of Science Times Cited 130] [SCOPUS Times Cited 153]


[4] M. Stojèev and G. Jovanoviæ, "Clock aligner based on delay locked loop with double edge synchronization," Microelectronics Reliability, vol. 48, no. 1, pp. 158-166, January 2008.
[CrossRef] [Web of Science Times Cited 13] [SCOPUS Times Cited 15]


[5] J. Yuan, et al., "High-Speed CMOS Circuit Technique," IEEE J. Solid-State Circuits, vol. 24, no.1, pp. 62-70, February 1989.
[CrossRef] [Web of Science Times Cited 379] [SCOPUS Times Cited 508]


[6] B.P. Das, N. Watson, Liu Yonghe, "Wide Tunable All Pass Filter Using OTA as Active Component," International Conference on Signals and Electronic Systems (ICSES), 2010, pp. 379-382.

[7] Chun-Ming Chang, B.M. Al-Hashimi, "Analytical synthesis of voltage mode OTA-C all-pass filters for high frequency operation, Circuits and Systems," Proceedings of the International Symposium on ISCAS '03, May 2003, pp. 461-464.
[CrossRef]


[8] Radu Gabriel Bozomitu, Neculai Cojan, "A VLSI Implementation of a New Low Voltage 5th Order Differential Gm-C Low-Pass Filter with Auto-Tuning Loop in CMOS Technology," Advances in Electrical and Computer Engineering, vol. 11, no. 1, pp. 23-30, 2011.
[CrossRef] [Full Text] [Web of Science Times Cited 4] [SCOPUS Times Cited 4]


[9] T. Sanchez Rodriguez, et al., "A CMOS Linear Tunable Transconductor For Continuous-Time Tunable Gm-C Filters," Circuits and Systems, IEEE International Symposium on ISCAS, 2008, pp. 912-915.
[CrossRef] [Web of Science Times Cited 4] [SCOPUS Times Cited 5]


[10] M. Pedro, et al., "A low-pass filter with automatic frequency tuning for a bluetooth receiver," 17th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2010, pp. 462-465.
[CrossRef] [SCOPUS Times Cited 3]


[11] Zhong Yuan Chang, D. Haspeslagh, and J. Verfaillie, "A Highly Linear CMOS Gm-C Bandpass Filter with On-Chip Frequency Tuning," IEEE J. of Solid-State Circuits, vol. 32, no. 3, pp.388-397, March 1997.
[CrossRef] [SCOPUS Times Cited 75]


[12] C. David, et al., "A Gm-C Low-pass Filter for Zero-IF Mobile Applications With a Very Wide Tuning Range," IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1443-1450, July 2005.
[CrossRef] [Web of Science Times Cited 67] [SCOPUS Times Cited 78]


[13] Franco Maloberi, Analog Design for CMOS VLSI Systems, Kluwer Academic Publisher, Boston, 2001.

[14] Mrinal Das, "Improved Design Criteria of Gain-Boosted CMOS OTA With High-Speed Optimizations," IEEE Transactions on Circuits and Systems II: vol. 49, no. 3, pp. 204-207, March 2002.
[CrossRef] [Web of Science Times Cited 32] [SCOPUS Times Cited 40]


[15] H. K. Khalil, Nonlinear Systems, Prentice Hall, Inc., USA, 1996.

[16] K. Bult and H. Wallinga, "A CMOS Analog Continuous-Time Delay Line with Adaptive Delay-Time Control," IEEE J. Solid-State Circuits, vol. 23, no. 3, pp. 759-766, June 1988.
[CrossRef] [Web of Science Times Cited 30] [SCOPUS Times Cited 30]


[17] Goran Jovanoviæ, Mile Stojèev, "A Delay Locked Loop for Analog Signal," in Proc. of 9-th International Conference TELSIKS, vol. 1, Niš, Serbia, October 2009, pp. 233-236.

[18] IHP-Microelectronics, SiGe:C BiCMOS Technologies for MPW & Prototyping, http://www.ihp-microelectronics.com/16.0.html.

[19] Pui-In Mak, Seng-Pan U, Rui Paulo Martines , Analog-Baseband Architectures and Circuits for Multistandard and Low-Voltage Wireless Transceivers, Springer, Netherlands, 2007.



References Weight

Web of Science® Citations for all references: 1,178 TCR
SCOPUS® Citations for all references: 1,607 TCR

Web of Science® Average Citations per reference: 59 ACR
SCOPUS® Average Citations per reference: 80 ACR

TCR = Total Citations for References / ACR = Average Citations per Reference

We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more

Citations for references updated on 2021-11-24 03:46 in 84 seconds.




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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania


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