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Quantitative Analysis of Memristance Defined Exponential Model for Multi-bits Titanium Dioxide Memristor Memory CellDAOUD, A. A. D. , DESSOUKI, A. A. S. , ABUELENIN, S. M.
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analytical models, memristors, nonvolatile memory, SPICE, tunneling
memristor(20), circuits(11), systems(9), model(6), devices(5), spice(4), physics(4), modeling(4), memristive(4), device(4)
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About this article
Date of Publication: 2016-05-31
Volume 16, Issue 2, Year 2016, On page(s): 75 - 84
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2016.02011
Web of Science Accession Number: 000376996100011
SCOPUS ID: 84974855611
The ability to store multiple bits in a single memristor based memory cell is a key feature for high-capacity memory packages. Studying multi-bit memristor circuits requires high accuracy in modelling the memristance change. A memristor model based on a novel definition of memristance is proposed. A design of a single memristor memory cell using the proposed model for the platinum electrodes titanium dioxide memristor is illustrated. A specific voltage pulse is used with varying its parameters (amplitude or pulse width) to store different number of states in a single memristor. New state variation parameters associated with the utilized model are provided and their effects on write and read processes of memristive multi-states are analysed. PSPICE simulations are also held, and they show a good agreement with the data obtained from the analysis.
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| L. O. Chua, "Memristor-the missing circuit element," Circuit Theory, IEEE Transactions on, vol. 18, pp. 507-519, 1971. |
[CrossRef] [SCOPUS Times Cited 6034]
 Y. Urata, Y. Takahashi, T. Sekine, and N. A. Nayan, "A low-power sense amplifier for adiabatic memory using memristor," in Circuits and Systems (APCCAS), 2012 IEEE Asia Pacific Conference on, 2012, pp. 112-115.
[CrossRef] [SCOPUS Times Cited 3]
 L. Zheng, S. Shin, and S.-M. S. Kang, "Memristor-based ternary content addressable memory (mTCAM) for data-intensive computing," Semiconductor Science and Technology, vol. 29, p. 104010, 2014.
[CrossRef] [Web of Science Times Cited 16] [SCOPUS Times Cited 16]
 M. S. Qureshi, M. Pickett, F. Miao, and J. P. Strachan, "CMOS interface circuits for reading and writing memristor crossbar array," in Circuits and systems (ISCAS), 2011 IEEE international symposium on, 2011, pp. 2954-2957.
[CrossRef] [SCOPUS Times Cited 44]
 A. Emara, M. Ghoneima, and M. El-Dessouky, "Differential 1T2M memristor memory cell for single/multi-bit RRAM modules," in Computer Science and Electronic Engineering Conference (CEEC), 2014 6th, 2014, pp. 69-72.
[CrossRef] [SCOPUS Times Cited 17]
 D. Fey, "Using the multi-bit feature of memristors for register files in signed-digit arithmetic units," Semiconductor Science and Technology, vol. 29, p. 104008, 2014.
[CrossRef] [Web of Science Times Cited 23] [SCOPUS Times Cited 23]
 S. Smaili and Y. Massoud, "Differential pair sense amplifier for a robust reading scheme for memristor-based memories," in Circuits and Systems (ISCAS), 2013 IEEE International Symposium on, 2013, pp. 1676-1679.
[CrossRef] [SCOPUS Times Cited 4]
 D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams, "The missing memristor found," nature, vol. 453, pp. 80-83, 2008.
[CrossRef] [Web of Science Times Cited 6778] [SCOPUS Times Cited 7460]
 R. E. Pino, J. W. Bohl, N. McDonald, B. Wysocki, P. Rozwood, K. A. Campbell, et al., "Compact method for modeling and simulation of memristor devices: ion conductor chalcogenide-based memristor devices," in Nanoscale Architectures (NANOARCH), 2010 IEEE/ACM International Symposium on, 2010, pp. 1-4.
[CrossRef] [SCOPUS Times Cited 63]
 C. Yakopcic, T. M. Taha, G. Subramanyam, R. E. Pino, and S. Rogers, "A memristor device model," IEEE electron device letters, vol. 32, pp. 1436-1438, 2011.
[CrossRef] [Web of Science Times Cited 183] [SCOPUS Times Cited 214]
 Á. Rák and G. Cserey, "Macromodeling of the memristor in SPICE," Computer-aided design of integrated circuits and systems, IEEE Transactions on, vol. 29, pp. 632-636, 2010.
[CrossRef] [Web of Science Times Cited 189] [SCOPUS Times Cited 219]
 S. Kvatinsky, E. G. Friedman, A. Kolodny, and U. C. Weiser, "TEAM: threshold adaptive memristor model," Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 60, pp. 211-221, 2013.
[CrossRef] [Web of Science Times Cited 418] [SCOPUS Times Cited 498]
 Y. N. Joglekar and S. J. Wolf, "The elusive memristor: properties of basic electrical circuits," European Journal of Physics, vol. 30, p. 661, 2009.
[CrossRef] [Web of Science Times Cited 534] [SCOPUS Times Cited 639]
 F. Corinto and A. Ascoli, "A boundary condition-based approach to the modeling of memristor nanostructures," Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 59, pp. 2713-2726, 2012.
[CrossRef] [Web of Science Times Cited 102] [SCOPUS Times Cited 129]
 Z. Biolek, D. Biolek, and V. Biolkova, "SPICE model of memristor with nonlinear dopant drift," Radioengineering, vol. 18, pp. 210-214, 2009.
 H. Abdalla and M. D. Pickett, "SPICE modeling of memristors," in Circuits and Systems (ISCAS), 2011 IEEE International Symposium on, 2011, pp. 1832-1835.
[CrossRef] [SCOPUS Times Cited 197]
 T. Xiao-Bo and X. Hui, "Characteristics of titanium oxide memristor with coexistence of dopant drift and a tunnel barrier," Chinese Physics B, vol. 23, p. 068401, 2014.
[CrossRef] [Web of Science Times Cited 6] [SCOPUS Times Cited 9]
 T. Prodromakis, B. P. Peh, C. Papavassiliou, and C. Toumazou, "A versatile memristor model with nonlinear dopant kinetics," Electron Devices, IEEE Transactions on, vol. 58, pp. 3099-3105, 2011.
[CrossRef] [Web of Science Times Cited 247] [SCOPUS Times Cited 308]
 A. Ascoli, F. Corinto, V. Senger, and R. Tetzlaff, "Memristor model comparison," Circuits and Systems Magazine, IEEE, vol. 13, pp. 89-105, 2013. .
[CrossRef] [Web of Science Times Cited 113] [SCOPUS Times Cited 129]
 S. Shin, K. Kim, and S. Kang, "Memristor applications for programmable analog ICs," Nanotechnology, IEEE Transactions on, vol. 10, pp. 266-274, 2011.
[CrossRef] [Web of Science Times Cited 246] [SCOPUS Times Cited 292]
 C. Yakopcic, T. M. Taha, G. Subramanyam, and R. E. Pino, "Generalized memristive device SPICE model and its application in circuit design," Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 32, pp. 1201-1214, 2013.
[CrossRef] [Web of Science Times Cited 140] [SCOPUS Times Cited 158]
 M. Laiho, E. Lehtonen, A. Russell, and P. Dudek, "Memristive synapses are becoming reality," The Neuromorphic Engineer, 2010.
 T. Chang, S.-H. Jo, K.-H. Kim, P. Sheridan, S. Gaba, and W. Lu, "Synaptic behaviors and modeling of a metal oxide memristive device," Applied physics A, vol. 102, pp. 857-863, 2011.
[CrossRef] [Web of Science Times Cited 266] [SCOPUS Times Cited 261]
 M. D. Pickett, D. B. Strukov, J. L. Borghetti, J. J. Yang, G. S. Snider, D. R. Stewart, et al., "Switching dynamics in titanium dioxide memristive devices," Journal of Applied Physics, vol. 106, p. 074508, 2009.
[CrossRef] [Web of Science Times Cited 417] [SCOPUS Times Cited 558]
 C. Yakopcic, "Memristor devices: Fabrication, Characterization, Simulation, and Circuit Design", pp. 56-57, University of Dayton, August, 2011.
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