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Stefan cel Mare
University of Suceava
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Computer Science
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ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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  3/2018 - 11

 HIGH-IMPACT PAPER 

Implementation of High Speed Tangent Sigmoid Transfer Function Approximations for Artificial Neural Network Applications on FPGA

KOYUNCU, I. See more information about KOYUNCU, I. on SCOPUS See more information about KOYUNCU, I. on IEEExplore See more information about KOYUNCU, I. on Web of Science
 
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Download PDF pdficon (1,589 KB) | Citation | Downloads: 1,360 | Views: 3,179

Author keywords
real-time systems, field programmable gate arrays, artificial neural networks, approximation methods, transfer functions

References keywords
neural(15), fpga(9), chaotic(9), artificial(9), network(7), networks(6), implementation(6), hardware(4), computing(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2018-08-31
Volume 18, Issue 3, Year 2018, On page(s): 79 - 86
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2018.03011
Web of Science Accession Number: 000442420900011
SCOPUS ID: 85052056771

Abstract
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Tangent Sigmoid (TanSig) Transfer Function (TSTF) is one of the nonlinear functions used in Artificial Neural Networks (ANNs). As TSTF includes exponential function operations, hardware-based implementation of this function is difficult. Thus, various methods have been proposed in the literature for the hardware implementation of TSTF. In this study, four different TSTF approaches on FPGA have been implemented using 32-bit IEEE 7541985 floating point number standard, and their performance analyses and FPGA chip statistics are presented. The Van der Pol system ANN application was carried out using four different FPGA-based TSTF units presented. The Multilayer feed-forward neural network structure was used in the study. The FPGA chip statistics and sensitivity analyses were carried out by applying each TSTF structure to the exemplary ANN. The maximum operating frequency of ANNs designed on FPGA using the four different TSTF units varied between 184362 MHz. The CORDIC-LUT-based ANN on FPGA was able to calculate 1 billion results in 3.284 s. According to the Van der Pol system ANN application carried out on FPGA, the CORDIC-LUT-based approach most closely reflected the reference ANN results. This study has a reference and key research for real-time artificial neural network applications used of tangent sigmoid one of the nonlinear transfer functions.


References | Cited By  «-- Click to see who has cited this paper

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[CrossRef] [Full Text] [Web of Science Times Cited 28] [SCOPUS Times Cited 28]


[2] E. Betiku, A. E. Taiwo, "Modeling and optimization of bioethanol production from breadfruit starch hydrolyzate response surface methodology and artificial neural network," Renewable Energy, In vivo thermography-based image for early detection of breast cancer using two-tier segmentation algorithm and artificial neural network vol. 74, pp. 87-94, 2015.
[CrossRef] [Web of Science Times Cited 144] [SCOPUS Times Cited 167]


[3] M. Alcin, I. Pehlivan, I. Koyuncu, "Hardware design and implementation of a novel ANN-based chaotic generator in FPGA," Optik-International Journal for Light and Electron Optics, vol. 127, pp. 5500-5505, 2016.
[CrossRef] [Web of Science Times Cited 59] [SCOPUS Times Cited 76]


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[CrossRef] [Web of Science Times Cited 1] [SCOPUS Times Cited 2]


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[CrossRef] [Web of Science Times Cited 212] [SCOPUS Times Cited 229]


[6] M. Tuna, C. B. Fidan, "A Study on the importance of chaotic oscillators based on FPGA for true random number generating (TRNG) and chaotic systems," Journal of the Faculty of Engineering and Architecture of Gazi University, vol. 33, pp. 469-486, 2018.
[CrossRef] [SCOPUS Times Cited 23]


[7] S. Roy, R. Banerjee, P. K. Bose, "Performance and exhaust emissions prediction of a CRDI assisted single cylinder diesel engine coupled with EGR using artificial neural network," Applied Energy, vol. 119, pp. 330-340, 2014.
[CrossRef] [Web of Science Times Cited 179] [SCOPUS Times Cited 204]


[8] M. Alcin, I. Pehlivan, I. Koyuncu, "The Performance Analysis of Artificial Neural Network Based Shimizu-Morioka Chaotic System with Respect to Sample Numbers," Balkan Journal of Electrical and Computer Engineering, vol. 3(4), pp. 252-255, 2015.
[CrossRef]


[9] M. Tuna, C. B. Fidan, "Electronic circuit design, implementation and FPGA-based realization of a new 3D chaotic system with single equilibrium point," Optik-International Journal for Light and Electron Optics, vol. 127(24), pp. 11786-11799, 2016.
[CrossRef] [Web of Science Times Cited 43] [SCOPUS Times Cited 50]


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[CrossRef] [Full Text] [Web of Science Times Cited 10] [SCOPUS Times Cited 18]


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[CrossRef] [SCOPUS Times Cited 11]


[12] I. Koyuncu, A. T. Ozcerit, "The design and realization of a new high speed FPGA-based chaotic true random number generator," Computers and Electrical Engineering, vol. 58, pp. 203-214, 2017.
[CrossRef] [Web of Science Times Cited 70] [SCOPUS Times Cited 79]


[13] M. A. Cavuslu, C. Karakuzu, S. Sahin, M. Yakut, "Neural network training based on FPGA with floating point number format and it's performance," Neural Computing and Applications, vol. 20, pp. 195-202, 2011.
[CrossRef] [Web of Science Times Cited 23] [SCOPUS Times Cited 27]


[14] A. Saad, K. Hany, A. Amin, "Three-dimensional turbulent swirling flow reconstruction using artificial neural networks," Journal of Mechanical Engineering and Automation, vol. 4, pp. 1-9, 2014.
[CrossRef]


[15] S. Brezetskyi, D. Dudkowski, T. Kapitaniak, "Rare and hidden attractors in Van der Pol-Duffing oscillators," The European Physical Journal Special Topics, vol. 224, pp. 1459-1467, 2015.
[CrossRef] [Web of Science Times Cited 84] [SCOPUS Times Cited 94]


[16] D. Suzuki, M. Natsui, A. Mochizuki, S. Miura, H. Honjo, H. Sato, S. Fukami, S. Ikeda, T. Endoh, H. Ohno, T. Hanyu, "Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure," IEEE Symposium on VLSI Circuits Digest of Technical Paper, pp. 172-173, 2015.
[CrossRef] [SCOPUS Times Cited 33]


[17] P. Nilsson, A. U. R. Shaik, Gangarajaiah R., Hertz E., "Hardware implementation of the exponential function using Taylor series," 32nd NORCHIP Conference, pp. 1-4, 2014.
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[18] I. Koyuncu, I. Sahin, C. Gloster, N. K. Saritekin, "A Neuron Library for Rapid Realization of Artificial Neural Networks on FPGA: A Case Study of Rossler Chaotic System," Journal of Circuits, Systems and Computers, vol. 26(01), pp. 1750015, 2017.
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[19] V. Tiwari, N. Khare, "Hardware implementation of neural network with sigmoidal activation functions using CORDIC," Microprocessors and Microsyststems, vol. 39, pp. 373-381, 2015.
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References Weight

Web of Science® Citations for all references: 935 TCR
SCOPUS® Citations for all references: 1,183 TCR

Web of Science® Average Citations per reference: 45 ACR
SCOPUS® Average Citations per reference: 56 ACR

TCR = Total Citations for References / ACR = Average Citations per Reference

We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more

Citations for references updated on 2024-07-10 04:37 in 136 seconds.




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