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A Diagonally Weighted Binary Memristor Crossbar Architecture Based on Multilayer Neural Network for Better Accuracy Rate in Speech Recognition ApplicationVO, M.-H.   |
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Author keywords
pattern recognition, memristors, neural network, neural network hardware, speech recognition
References keywords
neural(19), memristor(10), netw(7), networks(6), crossbar(6), circuit(6), recognition(5), network(5), multilayer(5), circuits(5)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2019-05-31
Volume 19, Issue 2, Year 2019, On page(s): 75 - 82
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2019.02010
Web of Science Accession Number: 000475806300010
SCOPUS ID: 85066310486
Abstract
A novel binary memristor crossbar architecture based on multilayer neural networks is proposed in the speech recognition application. Here, the memristor crossbar circuit acts as the weights of the neural network combined with the activation function circuit to determine the output. In the new crossbar architecture, the weights are arranged diagonally and divided into 2 arrays according to positive and negative weights. A speech recognition application for 5 vowels is implemented using the proposed architecture. The result shows that the average recognition rate achieves from 94 percent to 96.6 percent over 1000 audio samples. A statistical table shows that the recognition rate and the number of the memristors increase correspondingly to the number of used bits. From the Monte Carlo simulation, the recognition rate of the proposed binary memristor crossbar is decreased slightly from 94 percent to 93.7 percent, while the memristance variation is increased from 1 percent to 15 percent. |
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| [1] A. Waibel, T. Hanazawa, G. Hinton, K. Shikano, and K. J. Lang, "Phoneme recognition using time-delay neural networks," IEEE Trans. Acoust. Speech Signal Process., vol. 37, no. 3, pp. 328-339, Mar. 1989. [CrossRef] [Web of Science Times Cited 1267] [SCOPUS Times Cited 1730] [2] H. A. Rowley, S. Baluja, and T. Kanade, "Neural network-based face detection," IEEE Trans. Pattern Anal. Mach. Intell., vol. 20, no. 1, pp. 23-38, Jan. 1998. [CrossRef] [Web of Science Times Cited 2067] [SCOPUS Times Cited 2815] [3] R. Fierro and F. L. Lewis, "Control of a nonholonomic mobile robot using neural networks," IEEE Trans. Neural Netw., vol. 9, no. 4, pp. 589-600, Jul. 1998. [CrossRef] [Web of Science Times Cited 516] [SCOPUS Times Cited 649] [4] J. B. Lont and W. Guggenbuhl, "Analog CMOS implementation of a multilayer perceptron with nonlinear synapses," IEEE Trans. Neural Netw., vol. 3, no. 3, pp. 457-465, May 1992. [CrossRef] [Web of Science Times Cited 51] [SCOPUS Times Cited 61] [5] A. J. Montalvo, R. S. Gyurcsik, and J. J. Paulos, "Toward a general-purpose analog VLSI neural network with on-chip learning," IEEE Trans. Neural Netw., vol. 8, no. 2, pp. 413-423, Mar. 1997. [CrossRef] [Web of Science Times Cited 43] [SCOPUS Times Cited 56] [6] T. Shima, T. Kimura, Y. Kamatani, T. Itakura, Y. Fujita, and T. Iida, "Neuro chips with on-chip back-propagation and/or Hebbian learning," IEEE J. Solid-State Circuits, vol. 27, no. 12, pp. 1868-1876, Dec. 1992. [CrossRef] [Web of Science Times Cited 44] [SCOPUS Times Cited 50] [7] L. Gatet, H. Tap-Beteille, and F. Bony, "Comparison Between Analog and Digital Neural Network Implementations for Range-Finding Applications," IEEE Trans. Neural Netw., vol. 20, no. 3, pp. 460-470, Mar. 2009. [CrossRef] [Web of Science Times Cited 27] [SCOPUS Times Cited 44] [8] W. H. Lee and P. Mazumder, "Motion Detection by Quantum-Dots-Based Velocity-Tuned Filter," IEEE Trans. Nanotechnol., vol. 7, no. 3, pp. 355-362, May 2008. [CrossRef] [Web of Science Times Cited 9] [SCOPUS Times Cited 14] [9] P. Mazumder, S. Li, and I. E. Ebong, "Tunneling-Based Cellular Nonlinear Network Architectures for Image Processing," IEEE Trans. Very Large Scale Integr. VLSI Syst., vol. 17, no. 4, pp. 487-495, Apr. 2009. [CrossRef] [Web of Science Times Cited 37] [SCOPUS Times Cited 48] [10] L. Chua, "Memristor-The missing circuit element," IEEE Trans. Circuit Theory, vol. 18, no. 5, pp. 507-519, Sep. 1971. [CrossRef] [SCOPUS Times Cited 8400] [11] D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams, "The missing memristor found," Nature, vol. 453, no. 7191, pp. 80-83, May 2008. [CrossRef] [Web of Science Times Cited 8793] [SCOPUS Times Cited 9871] [12] M. Hu, H. Li, Y. Chen, Q. Wu, G. S. Rose, and R. W. Linderman, "Memristor Crossbar-Based Neuromorphic Computing System: A Case Study," IEEE Trans. Neural Netw. Learn. Syst., vol. 25, no. 10, pp. 1864-1878, Oct. 2014. [CrossRef] [Web of Science Times Cited 299] [SCOPUS Times Cited 343] [13] D. Chabi, Z. Wang, C. Bennett, J. Klein, and W. Zhao, "Ultrahigh Density Memristor Neural Crossbar for On-Chip Supervised Learning," IEEE Trans. Nanotechnol., vol. 14, no. 6, pp. 954-962, Nov. 2015. [CrossRef] [Web of Science Times Cited 38] [SCOPUS Times Cited 43] [14] S. N. Truong, S.-J. Ham, and K.-S. Min, "Neuromorphic crossbar circuit with nanoscale filamentary-switching binary memristors for speech recognition," Nanoscale Res. Lett., vol. 9, no. 1, p. 629, 2014. [CrossRef] [Web of Science Times Cited 62] [SCOPUS Times Cited 71] [15] S. N. Truong, S. Shin, S.-D. Byeon, J. Song, H.-S. Mo, and K.-S. Min, "Comparative Study on Statistical-Variation Tolerance Between Complementary Crossbar and Twin Crossbar of Binary Nano-scale Memristors for Pattern Recognition," Nanoscale Res. Lett., vol. 10, Oct. 2015. [CrossRef] [Web of Science Times Cited 9] [SCOPUS Times Cited 12] [16] H. M. Vo, "Training On-chip Hardware with Two Series Memristor Based Backpropagation Algorithm," in 2018 IEEE Seventh International Conference on Communications and Electronics (ICCE), 2018, pp. 179-183. [CrossRef] [SCOPUS Times Cited 3] [17] H. Harrer, "Multiple layer discrete-time cellular neural networks using time-variant templates," IEEE Trans. Circuits Syst. II Analog Digit. Signal Process., vol. 40, no. 3, pp. 191-199, Mar. 1993. [CrossRef] [Web of Science Times Cited 31] [SCOPUS Times Cited 34] [18] S. N. Truong, K. V. Pham, W. Yang, and K. Min, "Sequential Memristor Crossbar for Neuromorphic Pattern Recognition," IEEE Trans. Nanotechnol., vol. 15, no. 6, pp. 922-930, Nov. 2016. [CrossRef] [Web of Science Times Cited 31] [SCOPUS Times Cited 34] [19] S. P. Adhikari, H. Kim, R. K. Budhathoki, C. Yang, and L. O. Chua, "A Circuit-Based Learning Architecture for Multilayer Neural Networks With Memristor Bridge Synapses," IEEE Trans. Circuits Syst. Regul. Pap., vol. 62, no. 1, pp. 215-223, Jan. 2015. [CrossRef] [Web of Science Times Cited 132] [SCOPUS Times Cited 144] [20] D. Soudry, D. D. Castro, A. Gal, A. Kolodny, and S. Kvatinsky, "Memristor-Based Multilayer Neural Networks With Online Gradient Descent Training," IEEE Trans. Neural Netw. Learn. Syst., vol. 26, no. 10, pp. 2408-2421, Oct. 2015. [CrossRef] [Web of Science Times Cited 192] [SCOPUS Times Cited 229] [21] H. Kim, M. P. Sah, C. Yang, T. Roska, and L. O. Chua, "Neural Synaptic Weighting With a Pulse-Based Memristor Circuit," IEEE Trans. Circuits Syst. Regul. Pap., vol. 59, no. 1, pp. 148-158, Jan. 2012. [CrossRef] [Web of Science Times Cited 308] [SCOPUS Times Cited 332] [22] Y. Zhang, X. Wang, and E. G. Friedman, "Memristor-Based Circuit Design for Multilayer Neural Networks," IEEE Trans. Circuits Syst. Regul. Pap., vol. 65, no. 2, pp. 677-686, Feb. 2018. [CrossRef] [Web of Science Times Cited 163] [SCOPUS Times Cited 196] [23] X. Hu, G. Feng, S. Duan, and L. Liu, "A Memristive Multilayer Cellular Neural Network With Applications to Image Processing," IEEE Trans. Neural Netw. Learn. Syst., vol. 28, no. 8, pp. 1889-1901, Aug. 2017. [CrossRef] [Web of Science Times Cited 130] [SCOPUS Times Cited 144] [24] L. Muda, M. Begam, and I. Elamvazuthi, "Voice Recognition Algorithms using Mel Frequency Cepstral Coefficient (MFCC) and Dynamic Time Warping (DTW) Techniques," Journal of Computing, vol. 2, no. 3, pp. 138-143, Mar. 2010. Web of Science® Citations for all references: 14,249 TCR SCOPUS® Citations for all references: 25,323 TCR Web of Science® Average Citations per reference: 548 ACR SCOPUS® Average Citations per reference: 974 ACR TCR = Total Citations for References / ACR = Average Citations per Reference We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more Citations for references updated on 2025-04-14 23:18 in 156 seconds. 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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.
Permission for other use: The copyright owner's consent does not extend to copying for general distribution, for promotion, for creating new works, or for resale. Specific written permission must be obtained from the Editor for such copying. Direct linking to files hosted on this website is strictly prohibited.
Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.