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Compiler Optimization on Instruction Scheduling for a Specialized Real-Time Floating Point Soft-Core ProcessorKIRCHHOFF, M. , WAGNER, L. , FENGLER, W.
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dynamic compiler, optimization methods, processor scheduling, scheduling algorithms, vector processor
processor(10), systems(8), design(7), core(7), scheduling(6), fengler(6), embedded(5), compiler(5), time(4), system(4)
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About this article
Date of Publication: 2019-08-31
Volume 19, Issue 3, Year 2019, On page(s): 57 - 68
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2019.03007
Web of Science Accession Number: 000486574100007
SCOPUS ID: 85072200729
This paper presents the authors' research in the field of specialized optimizing assembly language compilers for embedded real-time soft-core processor systems on FPGAs. With this soft-core processor, we are targeting a highly specialized field of applications that require large floating-point precision and other unique characteristics. Therefore, a specialized optimizing assembly language compiler is necessary in order to provide the needed machine code and optimize it in a way that efficient usage of the internal parallelism mechanisms is possible, resulting in major performance benefits on single-core, multi-core and vector processors. One important key feature is the design-time analyzability to meet the hard real-time constraints of any given problem.
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