|2/2021 - 5|
Design, FPGA-based Implementation and Performance of a Pseudo Random Number Generator of Chaotic SequencesDRIDI, F. , EL ASSAD, S. , EL HADJ YOUSSEF, W. , MACHHOUT, M. , SAMHAT, A. E.
|View the paper record and citations in|
|Click to see author's profile in SCOPUS, IEEE Xplore, Web of Science|
|Download PDF (1,453 KB) | Citation | Downloads: 638 | Views: 785|
chaotic, field programmable gate arrays, hardware, performance evaluation, statistical analysis
chaotic(10), systems(9), random(8), generation(6), chaos(6), applications(6), implementation(5), design(5), circuits(5), theory(4)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2021-05-31
Volume 21, Issue 2, Year 2021, On page(s): 41 - 48
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2021.02005
Web of Science Accession Number: 000657126200005
SCOPUS ID: 85107700679
Pseudo-Random Number Generator of Chaotic Sequences (PRNG-CS) has caught the attention in various security applications, especially for stream and block ciphering, steganography, and digital watermarking algorithms. Indeed, in all chaos-based cryptographic systems, the chaotic generator plays a vital role and exhibits appropriate cryptographic properties. Due to the technological outbreak, as well as the rapid growth of the Internet of Things (IoT) technology and their various use cases, PRNGs-CS software implementation remains an open issue to meet its service requirements. The hardware implementation is one of the most flagship technology used to implement PRNGs-CS with the aim is to provide high-performance requirements for such application security. Therefore, in this work, we propose a new PRNGs-SC-based architecture. The latter consists of three discrete chaotic maps weakly coupled, as well as, the Piecewise Linear Chaotic Map (PWLCM), the Skew Tent, and the Logistic map. The chaotic system is designed on Xilinx Spartan-6 FPGA-board, using Very High-Speed Integrated Circuit Hardware Description Language (VHDL). Simulation results, performed over the ISE Design Suite environment, prove the effectiveness of our proposed architecture in terms of robustness against statistical attacks, throughput, and hardware cost. So, based on its architecture and the simulation results the proposed PRNG-SC can be used in cryptographic applications.
|References|||||Cited By «-- Click to see who has cited this paper|
| C. E. Shannon, "Communication theory of secrecy systems," The Bell system technical journal, vol. 28, no. 4, pp. 656-715, 1949. |
[CrossRef] [SCOPUS Times Cited 5975]
 L. Kocarev, "Chaos-based cryptography: a brief overview," IEEE Circuits and Systems Magazine, vol. 1, no. 3, pp. 6-21, 2001.
[CrossRef] [SCOPUS Times Cited 676]
 M. Andrecut, "Logistic map as a random number generator," International Journal of Modern Physics B, vol. 12, no. 09, pp. 921-930, 1998.
[CrossRef] [Web of Science Times Cited 57] [SCOPUS Times Cited 73]
 M. Alioto, S. Bernardi, A. Fort, S. Rocchi, V. Vignoli, "Analysis and design of digital PRNGS based on the discretized sawtooth map," in Proc. 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003, IEEE, 2003, pp. 427-430
 M. E. Yalcin, J. A. Suykens, J. Vandewalle, "True random bit generation from a double-scroll attractor," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 51, no. 7, pp. 1395-1404, 2004.
[CrossRef] [Web of Science Times Cited 217] [SCOPUS Times Cited 272]
 M. A. Zidan, A. G. Radwan, K. N. Salama, "Random number generation based on digital differential chaos," in Proc. 54th International Midwest Symposium on Circuits and Systems (MWSCAS), IEEE, 2011, pp. 1-4.
[CrossRef] [SCOPUS Times Cited 44]
 O. Jallouli, S. El Assad, M. Chetto, R. Lozi, "Design and analysis of two stream ciphers based on chaotic coupling and multiplexing techniques," Multimedia tools and applications, vol. 77, no. 11, pp. 13391-13417, 2018.
[CrossRef] [Web of Science Times Cited 19] [SCOPUS Times Cited 21]
 F. Dridi, S. El Assad, W. E. Youssef, M. Machhout, "FPGA Implementation of a pseudo-chaotic number generator and evaluation of its performance," in Proc. 2019 International Conference on Internet of Things, Embedded Systems and Communications (IINTEC), IEEE, 2019, pp. 231-234.
[CrossRef] [SCOPUS Times Cited 3]
 G. Gautier, M. Le Glatin, S. El Assad, W. Hamidouche, O. Deforges, S. Guilley, A. Facon, "Hardware implementation of lightweight chaos-based stream cipher", in Proc. The Fourth International Conference on Cyber-Technologies and Cyber-Systems (CYBER 2019), Porto, Portugal, 2019, pp. 37-40
 S. El Assad, H. Noura, I. Taralova, "Design and analyses of efficient chaotic generators for crypto-systems," in Proc. Advances in Electrical and Electronics Engineering-IAENG Special Edition of the World Congress on Engineering and Computer Science 2008, IEEE, 2008, pp. 3-12.
[CrossRef] [Web of Science Times Cited 2] [SCOPUS Times Cited 28]
 L. Kocarev, G. Jakimoski, "Pseudorandom bits generated by chaotic maps," IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, vol. 50, no. 1, pp. 123-126, 2003.
[CrossRef] [Web of Science Times Cited 68] [SCOPUS Times Cited 90]
 T. Addabbo, M. Alioto, A. Fort, S. Rocchi, V. Vignoli, "The digital tent map: Performance analysis and optimized design as a low-complexity source of pseudorandom bits," IEEE Transactions on Instrumentation and Measurement, vol. 55, no. 5, pp. 1451-1458, 2006.
[CrossRef] [Web of Science Times Cited 30] [SCOPUS Times Cited 33]
 M. A. -Chenaghlu, M. A. Balafar, M. R. F. -Derakhshi, "A novel image encryption algorithm based on polynomial combination of chaotic maps and dynamic function generation," Signal Processing, vol. 157, pp. 1-13, 2019.
[CrossRef] [Web of Science Times Cited 60] [SCOPUS Times Cited 67]
 A. V. Tutueva, E. G. Nepomuceno, A. I. Karimov, V. S. Andreev, D. N. Butusov, "Adaptive chaotic maps and their application to pseudo-random numbers generation," Chaos, Solitons & Fractals, vol. 133, pp. 109615, 2020.
[CrossRef] [Web of Science Times Cited 49] [SCOPUS Times Cited 58]
 I. Koyuncu, "Implementation of high speed tangent sigmoid transfer function approximations for artificial neural network applications on FPGA," Advances in Electrical and Computer Engineering, vol. 18, no. 3, pp. 79-86, 2018.
[CrossRef] [Full Text] [Web of Science Times Cited 14] [SCOPUS Times Cited 14]
 A. Rukhin, J. Soto, J. Nechvatal, M. Smid, E. Barker, "A statistical test suite for random and pseudorandom number generators for cryptographic applications," Technical report, Booz-allen and hamilton inc mclean va, 2001.
 P. F. Verhulst, "Resherches mathematiques sur la loi d'accroissement de la population," Nouveaux memoires de l'academie royale des sciences, vol. 18, pp. 1-41, 1845
 S. M. Ulam, "On combination of stochastic and deterministic processes," Bull. Amer. Math. Soc., vol. 53, pp. 1120, 1947
 Y. S. Kim, W. W. Zachary, "The physics of phase space: Nonlinear dynamics and chaos, geometric quantization, and wigner function," Springer, vol. 278, 2006
 J. L. Valtierra, E. T. Cuautle, Esteban, A. R. Vazquez, "A switched-capacitor skew-tent map implementation for random number generation," International Journal of Circuit Theory and Applications, vol. 45, no. 2, pp. 305-315, 2017.
[CrossRef] [Web of Science Times Cited 33] [SCOPUS Times Cited 41]
 Y. Hu, C. Zhu, Z. Wang, "An improved piecewise linear chaotic map based image encryption algorithm," The Scientific World Journal, vol. 2014, 2014.
[CrossRef] [Web of Science Times Cited 5] [SCOPUS Times Cited 25]
 E. Barker, L. Feldman, G. Witte, "Recommendation for random number generation using deterministic random bit generators," National Institute of Standards and Technology, 2015.
 M. Tuna, I. Koyuncu, C. B. Fidan, I. Pehlivan, "Real time implementation of a novel chaotic generator on FPGA," in Proc. 23nd Signal Processing and Communications Applications Conference (SIU). IEEE, 2015, pp. 698-701.
[CrossRef] [SCOPUS Times Cited 10]
 H. Guntur, J. Ishii, A. Satoh, "Side-channel attack user reference architecture board SAKURA-G," in Proc. 3rd Global Conference on Consumer Electronics (GCCE), IEEE, 2014, pp. 271-274.
[CrossRef] [SCOPUS Times Cited 43]
 M. Tuna, I. Koyuncu, M. Alcin, "Fixed and floating point-based high-speed chaotic oscillator design with different numerical algorithms on FPGA,", 2018.
[CrossRef] [Web of Science Times Cited 33] [SCOPUS Times Cited 36]
 K. Pearson, "Contributions to the mathematical theory of evolution," Philosophical Transactions of the Royal Society of London. A, vol. 185, pp. 71-110, 1894.
 L. Pace, Chi-square tests,. Beginning R. Apress, Berkeley, CA, Springer, pp. 217-228, 2012.
 D. C. Howell, "Chi-Square Test: Analysis of Contingency Tables," 2011.
 G. Chen, Y. Mao, C. K. Chui, "A symmetric image encryption scheme based on 3D chaotic cat maps," Chaos, Solitons & Fractals, vol. 21, no. 3, pp. 749-761. 2004.
[CrossRef] [Web of Science Times Cited 1337] [SCOPUS Times Cited 1712]
Web of Science® Citations for all references: 1,924 TCR
SCOPUS® Citations for all references: 9,221 TCR
Web of Science® Average Citations per reference: 64 ACR
SCOPUS® Average Citations per reference: 307 ACR
TCR = Total Citations for References / ACR = Average Citations per Reference
We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more
Citations for references updated on 2022-09-27 22:41 in 155 seconds.
Note1: Web of Science® is a registered trademark of Clarivate Analytics.
Note2: SCOPUS® is a registered trademark of Elsevier B.V.
Disclaimer: All queries to the respective databases were made by using the DOI record of every reference (where available). Due to technical problems beyond our control, the information is not always accurate. Please use the CrossRef link to visit the respective publisher site.
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.
Permission for other use: The copyright owner's consent does not extend to copying for general distribution, for promotion, for creating new works, or for resale. Specific written permission must be obtained from the Editor for such copying. Direct linking to files hosted on this website is strictly prohibited.
Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.