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Stochastic Simulation of Integrated Circuits with Nonlinear Black-Box Components via Augmented Deterministic EquivalentsMANFREDI, P. , STIEVANO, I. S. , CANAVERO, F. G. |
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Author keywords
circuit simulation, integrated circuits, nonlinear circuits, SPICE, statistical analysis
References keywords
stochastic(11), design(8), circuits(8), technology(7), polynomial(7), packaging(6), manufacturing(6), components(6), chaos(6), canavero(6)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2014-11-30
Volume 14, Issue 4, Year 2014, On page(s): 3 - 8
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2014.04001
Web of Science Accession Number: 000348772500001
SCOPUS ID: 84921691268
Abstract
This paper extends recent literature results concerning the statistical simulation of circuits affected by random electrical parameters by means of the polynomial chaos framework. With respect to previous implementations, based on the generation and simulation of augmented and deterministic circuit equivalents, the modeling is extended to generic and black-box multi-terminal nonlinear subcircuits describing complex devices, like those found in integrated circuits. Moreover, based on recently-published works in this field, a more effective approach to generate the deterministic circuit equivalents is implemented, thus yielding more compact and efficient models for nonlinear components. The approach is fully compatible with commercial (e.g., SPICE-type) circuit simulators and is thoroughly validated through the statistical analysis of a realistic interconnect structure with a 16-bit memory chip. The accuracy and the comparison against previous approaches are also carefully established. |
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[1] Analysis of RLC Elements under Stochastic Conditions Using the First and the Second Moments, WALCZAK, J., MAZURKIEWICZ, S., GRABOWSKI, D., Advances in Electrical and Computer Engineering, ISSN 1582-7445, Issue 4, Volume 15, 2015.
Digital Object Identifier: 10.4316/AECE.2015.04010 [CrossRef] [Full text]
[2] Application of Taylor models to the worst-case analysis of stripline interconnects, Manfredi, Paolo, Trinchero, Riccardo, Canavero, Flavio G., Stievano, Igor S., 2016 IEEE 20th Workshop on Signal and Power Integrity (SPI), ISBN 978-1-5090-0349-5, 2016.
Digital Object Identifier: 10.1109/SaPIW.2016.7496302 [CrossRef]
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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
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