4/2023 - 7 |
A Novel Resource Sharing Channel Interleaver for 5G NRLAKSHMI, J. L. , JAYAKUMARI, J. |
Extra paper information in |
Click to see author's profile in SCOPUS, IEEE Xplore, Web of Science |
Download PDF (1,400 KB) | Citation | Downloads: 937 | Views: 759 |
Author keywords
channel coding, error correction codes, field programmable gate arrays, hardware, wireless communication
References keywords
interleaver(9), design(7), channel(7), polar(6), communications(6), codes(6), technology(5), implementation(5), efficient(5), communication(5)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2023-11-30
Volume 23, Issue 4, Year 2023, On page(s): 61 - 68
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2023.04007
Web of Science Accession Number: 001147490000003
SCOPUS ID: 85182176142
Abstract
Fifth-Generation (5G) New Radio (NR) relies on distinct channel interleavers for data and control channels to effectively mitigate burst errors. However, implementing these interleavers individually leads to a substantial increase in silicon cost. To address this challenge and optimize resource utilization while enhancing system performance, a novel Resource Sharing Channel Interleaver (RSCI) architecture for data and control channels in 5G NR is proposed. The RSCI is built upon a straightforward algorithm based on the 3rd Generation Partnership Project (3GPP) Release 15 (R15) standard for 5G NR and is implemented using Xilinx design suite on the Virtex 7 (XC7VX330T) Field Programmable Gate Array (FPGA). The presented RSCI demonstrates remarkable improvements over existing architectures. Specifically, it achieves a reduction in resource utilization by 20% and a cutback in power consumption by 19.2% compared to the existing architecture. To highlight the cost-effectiveness of the proposed approach, both interleavers are implemented as separate entities. Synthesis results indicate that the separate implementation occupies nearly double the resources compared to the combined interleaver implementation. |
References | | | Cited By |
Web of Science® Times Cited: 0
View record in Web of Science® [View]
View Related Records® [View]
Updated today
SCOPUS® Times Cited: 2
View record in SCOPUS® [Free preview]
View citations in SCOPUS® [Free preview]
[1] A Hardware Efficient Implementation of Sub-Block Interleaver for Polar Codes in 5G NR, Lakshmi, J L, J, Jayakumari, 2024 International Conference on Advancements in Power, Communication and Intelligent Systems (APCI), ISBN 979-8-3503-6328-9, 2024.
Digital Object Identifier: 10.1109/APCI61480.2024.10617080 [CrossRef]
Disclaimer: All information displayed above was retrieved by using remote connections to respective databases. For the best user experience, we update all data by using background processes, and use caches in order to reduce the load on the servers we retrieve the information from. As we have no control on the availability of the database servers and sometimes the Internet connectivity may be affected, we do not guarantee the information is correct or complete. For the most accurate data, please always consult the database sites directly. Some external links require authentication or an institutional subscription.
Web of Science® is a registered trademark of Clarivate Analytics, Scopus® is a registered trademark of Elsevier B.V., other product names, company names, brand names, trademarks and logos are the property of their respective owners.
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.
Permission for other use: The copyright owner's consent does not extend to copying for general distribution, for promotion, for creating new works, or for resale. Specific written permission must be obtained from the Editor for such copying. Direct linking to files hosted on this website is strictly prohibited.
Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.