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Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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  1/2019 - 8

Design Options for Current Limit and Power Limit Circuit Protections for LDOs

PLESA, C.-S. See more information about PLESA, C.-S. on SCOPUS See more information about PLESA, C.-S. on IEEExplore See more information about PLESA, C.-S. on Web of Science, DIMITRIU, B. See more information about  DIMITRIU, B. on SCOPUS See more information about  DIMITRIU, B. on SCOPUS See more information about DIMITRIU, B. on Web of Science, NEAG, M. See more information about NEAG, M. on SCOPUS See more information about NEAG, M. on SCOPUS See more information about NEAG, M. on Web of Science
 
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Download PDF pdficon (1,394 KB) | Citation | Downloads: 3,786 | Views: 4,546

Author keywords
current limiters, power dissipation, power system protection, short-circuit currents, thermal analysis

References keywords
current(14), protection(10), circuit(8), voltage(6), regulator(6), temperature(5), limit(5), regulators(4), high(4), circuits(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2019-02-28
Volume 19, Issue 1, Year 2019, On page(s): 57 - 62
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2019.01008
Web of Science Accession Number: 000459986900008
SCOPUS ID: 85064055060

Abstract
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This paper presents novel circuitry for protection of the power transistor in LDOs with adjustable output voltage implemented in BJT technologies. First, an improvement is proposed to a current limit circuit reported previously, that significantly reduces the variation of the value the output current is limited to, caused by setting the output voltage to different values. Next, two circuits for ensuring that the power transistor operates within its safe operating area are introduced; they are based on the proposed current limit circuit, but its activation point is no longer proportional to the output current but to the sum of the output current and a current proportional to the voltage drop across the power transistor. Finally, a circuit that monitors and limits the power dissipated is described; it also employs the proposed current limit circuit but this time the activation point is proportional to the product of the output current and the voltage drop across the power transistor. Three LDOs that employ the three types of protections proposed here are then compared, considering the power dissipated by the power transistor and the resulting maximum die temperature.


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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania


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