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Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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  3/2015 - 21

 HIGH-IMPACT PAPER 

Genetic Synthesis of New Reversible/Quantum Ternary Comparator

DEIBUK, V. See more information about DEIBUK, V. on SCOPUS See more information about DEIBUK, V. on IEEExplore See more information about DEIBUK, V. on Web of Science, BILOSHYTSKYI, A. See more information about BILOSHYTSKYI, A. on SCOPUS See more information about BILOSHYTSKYI, A. on SCOPUS See more information about BILOSHYTSKYI, A. on Web of Science
 
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Download PDF pdficon (1,130 KB) | Citation | Downloads: 714 | Views: 3,396

Author keywords
genetic algorithms, multivalued logic, ternary comparators, reversible logic, quantum computing

References keywords
quantum(22), logic(16), sible(12), circuits(11), multiple(9), ternary(8), khan(7), evolutionary(7), soft(6), genetic(6)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2015-08-31
Volume 15, Issue 3, Year 2015, On page(s): 147 - 152
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2015.03021
Web of Science Accession Number: 000360171500021
SCOPUS ID: 84940762198

Abstract
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Methods of quantum/reversible logic synthesis are based on the use of the binary nature of quantum computing. However, multiple-valued logic is a promising choice for future quantum computer technology due to a number of advantages over binary circuits. In this paper we have developed a synthesis of ternary reversible circuits based on Muthukrishnan-Stroud gates using a genetic algorithm. The method of coding chromosome is presented, and well-grounded choice of algorithm parameters allowed obtaining better circuit schemes of one- and n-qutrit ternary comparators compared with other methods. These parameters are quantum cost of received reversible devices, delay time and number of constant input (ancilla) lines. Proposed implementation of the genetic algorithm has led to reducing of the device delay time and the number of ancilla qutrits to 1 and 2n-1 for one- and n-qutrits full comparators, respectively. For designing of n-qutrit comparator we have introduced a complementary device which compares output functions of 1-qutrit comparators.


References | Cited By

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Cited-By SCOPUS

SCOPUS® Times Cited: 9
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Cited-By CrossRef

[1] Towards designing quantum reversible ternary multipliers, Asadi, Mohammad-Ali, Mosleh, Mohammad, Haghparast, Majid, Quantum Information Processing, ISSN 1570-0755, Issue 7, Volume 20, 2021.
Digital Object Identifier: 10.1007/s11128-021-03161-6
[CrossRef]

[2] A novel reversible ternary coded decimal adder/subtractor, Asadi, Mohammad-Ali, Mosleh, Mohammad, Haghparast, Majid, Journal of Ambient Intelligence and Humanized Computing, ISSN 1868-5137, Issue 7, Volume 12, 2021.
Digital Object Identifier: 10.1007/s12652-020-02499-6
[CrossRef]

[3] Towards quantum reversible ternary coded decimal adder, Haghparast, Majid, Wille, Robert, Monfared, Asma Taheri, Quantum Information Processing, ISSN 1570-0755, Issue 11, Volume 16, 2017.
Digital Object Identifier: 10.1007/s11128-017-1735-3
[CrossRef]

[4] Quantum Ternary Multiplication Gate (QTMG): Toward Quantum Ternary Multiplier and a New Realization for Ternary Toffoli Gate, Monfared, Asma Taheri, Haghparast, Majid, Journal of Circuits, Systems and Computers, ISSN 0218-1266, Issue 05, Volume 29, 2020.
Digital Object Identifier: 10.1142/S0218126620500711
[CrossRef]

[5] Efficient design of quaternary quantum comparator with only a single ancillary input, Norouzi Doshanlou, Abdollah, Haghparast, Majid, Hosseinzadeh, Mehdi, Reshadi, Midia, IET Circuits, Devices & Systems, ISSN 1751-858X, Issue 1, Volume 14, 2020.
Digital Object Identifier: 10.1049/iet-cds.2019.0098
[CrossRef]

[6] Ternary reversible/quantum latches, Hu, Zhengbing, Yuriychuk, Ivan, Deibuk, Vitaly, 2017 IEEE First Ukraine Conference on Electrical and Computer Engineering (UKRCON), ISBN 978-1-5090-3006-4, 2017.
Digital Object Identifier: 10.1109/UKRCON.2017.8100380
[CrossRef]

[7] New design of reversible/quantum devices for ternary arithmetic, Hu, Zhengbing, Deibuk, Vitaly, 2016 IEEE First International Conference on Data Stream Mining & Processing (DSMP), ISBN 978-1-5090-3736-0, 2016.
Digital Object Identifier: 10.1109/DSMP.2016.7583512
[CrossRef]

[8] Optimized design of the universal ternary gates for quantum/reversible computing, Deibuk, Vitaly, Turchenko, Iryna, Shults, Vladyslav, 2015 IEEE 8th International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS), ISBN 978-1-4673-8359-2, 2015.
Digital Object Identifier: 10.1109/IDAACS.2015.7341452
[CrossRef]

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