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Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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  2/2016 - 11

Quantitative Analysis of Memristance Defined Exponential Model for Multi-bits Titanium Dioxide Memristor Memory Cell

DAOUD, A. A. D. See more information about DAOUD, A. A. D. on SCOPUS See more information about DAOUD, A. A. D. on IEEExplore See more information about DAOUD, A. A. D. on Web of Science, DESSOUKI, A. A. S. See more information about  DESSOUKI, A. A. S. on SCOPUS See more information about  DESSOUKI, A. A. S. on SCOPUS See more information about DESSOUKI, A. A. S. on Web of Science, ABUELENIN, S. M. See more information about ABUELENIN, S. M. on SCOPUS See more information about ABUELENIN, S. M. on SCOPUS See more information about ABUELENIN, S. M. on Web of Science
 
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Download PDF pdficon (1,465 KB) | Citation | Downloads: 772 | Views: 2,809

Author keywords
analytical models, memristors, nonvolatile memory, SPICE, tunneling

References keywords
memristor(20), circuits(11), systems(9), model(6), devices(5), spice(4), physics(4), modeling(4), memristive(4), device(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2016-05-31
Volume 16, Issue 2, Year 2016, On page(s): 75 - 84
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2016.02011
Web of Science Accession Number: 000376996100011
SCOPUS ID: 84974855611

Abstract
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The ability to store multiple bits in a single memristor based memory cell is a key feature for high-capacity memory packages. Studying multi-bit memristor circuits requires high accuracy in modelling the memristance change. A memristor model based on a novel definition of memristance is proposed. A design of a single memristor memory cell using the proposed model for the platinum electrodes titanium dioxide memristor is illustrated. A specific voltage pulse is used with varying its parameters (amplitude or pulse width) to store different number of states in a single memristor. New state variation parameters associated with the utilized model are provided and their effects on write and read processes of memristive multi-states are analysed. PSPICE simulations are also held, and they show a good agreement with the data obtained from the analysis.


References | Cited By

Cited-By Clarivate Web of Science

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Cited-By SCOPUS

SCOPUS® Times Cited: 2
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Cited-By CrossRef

[1] A high precision write/read circuits for memristors using digital input/output interfaces, Daoud, Ahmad A., Dessouki, Ahmed S., Mostafa, Hassan, Abdallah, Rania M., El-Rabaie, El-Sayed M., Microelectronics Journal, ISSN 0026-2692, Issue , 2020.
Digital Object Identifier: 10.1016/j.mejo.2019.104694
[CrossRef]

[2] A Novel Refreshment Circuit for 2T1M Neuromorphic Synapse, Goda, Mai M., Hassan, Ahmed H., Mostafa, Hassan, Soliman, Ahmed M., Journal of Circuits, Systems and Computers, ISSN 0218-1266, Issue 03, Volume 31, 2022.
Digital Object Identifier: 10.1142/S0218126622500475
[CrossRef]

Updated 5 days, 13 hours ago

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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania


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