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JCR Impact Factor: 0.825
JCR 5-Year IF: 0.752
SCOPUS CiteScore: 2.5
Issues per year: 4
Current issue: Nov 2022
Next issue: Feb 2023
Avg review time: 74 days
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PUBLISHER

Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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LATEST NEWS

2022-Jun-28
Clarivate Analytics published the InCites Journal Citations Report for 2021. The InCites JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.825 (0.722 without Journal self-cites), and the InCites JCR 5-Year Impact Factor is 0.752.

2022-Jun-16
SCOPUS published the CiteScore for 2021, computed by using an improved methodology, counting the citations received in 2018-2021 and dividing the sum by the number of papers published in the same time frame. The CiteScore of Advances in Electrical and Computer Engineering in 2021 is 2.5, the same as for 2020 but better than all our previous results.

2021-Jun-30
Clarivate Analytics published the InCites Journal Citations Report for 2020. The InCites JCR Impact Factor of Advances in Electrical and Computer Engineering is 1.221 (1.053 without Journal self-cites), and the InCites JCR 5-Year Impact Factor is 0.961.

2021-Jun-06
SCOPUS published the CiteScore for 2020, computed by using an improved methodology, counting the citations received in 2017-2020 and dividing the sum by the number of papers published in the same time frame. The CiteScore of Advances in Electrical and Computer Engineering in 2020 is 2.5, better than all our previous results.

2021-Apr-15
Release of the v3 version of AECE Journal website. We moved to a new server and implemented the latest cryptographic protocols to assure better compatibility with the most recent browsers. Our website accepts now only TLS 1.2 and TLS 1.3 secure connections.

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  4/2016 - 7

 HIGHLY CITED PAPER 

Improving the Performances of the nMPRA Processor using a Custom Interrupt Management Scheduling Policy

ZAGAN, I. See more information about ZAGAN, I. on SCOPUS See more information about ZAGAN, I. on IEEExplore See more information about ZAGAN, I. on Web of Science, GAITAN, V. G. See more information about GAITAN, V. G. on SCOPUS See more information about GAITAN, V. G. on SCOPUS See more information about GAITAN, V. G. on Web of Science
 
View the paper record and citations in View the paper record and citations in Google Scholar
Click to see author's profile in See more information about the author on SCOPUS SCOPUS, See more information about the author on IEEE Xplore IEEE Xplore, See more information about the author on Web of Science Web of Science

Download PDF pdficon (1,428 KB) | Citation | Downloads: 602 | Views: 2,226

Author keywords
field programmable gate arrays, pipeline processing, architecture, scheduling, operating systems

References keywords
architecture(8), time(5), systems(5), real(5), hardware(5)
No common words between the references section and the paper title.

About this article
Date of Publication: 2016-11-30
Volume 16, Issue 4, Year 2016, On page(s): 45 - 50
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2016.04007
Web of Science Accession Number: 000390675900007
SCOPUS ID: 85007570607

Abstract
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A quantitative and qualitative increase in production has been obtained in most fields through the development of CPUs and real-time systems based on them. Such is the case in the industrial sector where the automation process relieved partly or wholly the human activities needed in the manufacturing process. This is mainly due to time sharing in embedded real-time systems and to pseudo-parallel execution of tasks in the implementation of a single central processing unit. The present article presents the validation of the nHSE (Hardware Scheduler Engine) scheduler implemented in hardware by using a FPGA Xilinx Virtex-7, Vivado development platform, and the Vivado Simulator. In this context, our main contribution relates to a custom interrupt management scheduling policy implemented in hardware at the nHSE level, in order to provide predictable execution for asynchronous interrupts. By reducing the jitter when handling with asynchronous interrupts and completely eliminating the uncertainties of the scheduling limit for the set of tasks, a significant improvement of the overall system's predictability has been obtained.


References | Cited By

Cited-By Clarivate Web of Science

Web of Science® Times Cited: 7 [View]
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Cited-By SCOPUS

SCOPUS® Times Cited: 6
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Cited-By CrossRef

[1] Hardware RTOS: Custom Scheduler Implementation Based on Multiple Pipeline Registers and MIPS32 Architecture, Zagan, Ionel, Găitan, Vasile, Electronics, ISSN 2079-9292, Issue 2, Volume 8, 2019.
Digital Object Identifier: 10.3390/electronics8020211
[CrossRef]

[2] Healthcare IoT m-GreenCARDIO Remote Cardiac Monitoring System - Concept, Theory of Operation and Implementation, ZAGAN, I., GAITAN, V. G., PETRARIU, A.-I., BREZULIANU, A., Advances in Electrical and Computer Engineering, ISSN 1582-7445, Issue 2, Volume 17, 2017.
Digital Object Identifier: 10.4316/AECE.2017.02004
[CrossRef] [Full text]

[3] Synthesis analysis and evaluation of hardware scheduler based on different scheduling algorithms, Zagan, Ionel, 2018 International Conference on Development and Application Systems (DAS), ISBN 978-1-5386-1493-8, 2018.
Digital Object Identifier: 10.1109/DAAS.2018.8396064
[CrossRef]

Updated 2 days, 12 hours ago

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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania


All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.

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