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FACTS & FIGURES

JCR Impact Factor: 0.700
JCR 5-Year IF: 0.700
SCOPUS CiteScore: 1.8
Issues per year: 4
Current issue: May 2024
Next issue: Aug 2024
Avg review time: 57 days
Avg accept to publ: 60 days
APC: 300 EUR


PUBLISHER

Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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FEATURED ARTICLES

Application of the Voltage Control Technique and MPPT of Stand-alone PV System with Storage, HIVZIEFENDIC, J., VUIC, L., LALE, S., SARIC, M.
Issue 1/2022

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LATEST NEWS

2024-Jun-20
Clarivate Analytics published the InCites Journal Citations Report for 2023. The InCites JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.700 (0.700 without Journal self-cites), and the InCites JCR 5-Year Impact Factor is 0.600.

2023-Jun-28
Clarivate Analytics published the InCites Journal Citations Report for 2022. The InCites JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.800 (0.700 without Journal self-cites), and the InCites JCR 5-Year Impact Factor is 1.000.

2023-Jun-05
SCOPUS published the CiteScore for 2022, computed by using an improved methodology, counting the citations received in 2019-2022 and dividing the sum by the number of papers published in the same time frame. The CiteScore of Advances in Electrical and Computer Engineering for 2022 is 2.0. For "General Computer Science" we rank #134/233 and for "Electrical and Electronic Engineering" we rank #478/738.

2022-Jun-28
Clarivate Analytics published the InCites Journal Citations Report for 2021. The InCites JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.825 (0.722 without Journal self-cites), and the InCites JCR 5-Year Impact Factor is 0.752.

2022-Jun-16
SCOPUS published the CiteScore for 2021, computed by using an improved methodology, counting the citations received in 2018-2021 and dividing the sum by the number of papers published in the same time frame. The CiteScore of Advances in Electrical and Computer Engineering for 2021 is 2.5, the same as for 2020 but better than all our previous results.

Read More »


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Search results for: design

841 results found.

85 pages of results.
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Year: 2016, Volume: 16, Number: 4
... image by certain sampling rules. It is a typical form of layered data structure designed for organizing multi-resolution raster data and it can significantly reduce image rendering time. ... Computer Engineering Volume 16, Number 4, 2016 specifically. For example, our design of the index object refined filter is redundant because the objects in the grids ...
Terms matched: 2  -  Score: 11  -  1,439k
Year: 2010, Volume: 10, Issue: 1
... as the steady-state performance of the 0 proposed controller is as good as a properly designed VOC. The harmonic spectrum of the phase current ia is shown in -10 ... is synthesized by a PWM control and modulation strategies [6, 7], design and adaption block. Simulation results confirm the effectiveness of the in AC/ ...
Terms matched: 2  -  Score: 11  -  450k
Year: 2010, Volume: 10, Issue: 2
... the medical data servers; implementation of this sub-module are compatible ï‚· supported command set designed to provide with Windows 7/XP/2000, Linux and Windows complete ... HL7 data that can request data about patients from HL7 messaging is used. The design and the medical data servers; implementation of this sub-module are compatible ï‚· supported ...
Terms matched: 2  -  Score: 11  -  758k
Year: 2015, Volume: 15, Number: 3
... result of the non-optimal PCB layout PV inverter was developed as a separate converter which design (i.e. significant parasitic inductances of the long T 3 consists of a ... the extra connected to the output of a three-phase variable care should be taken when designing the converter PCB autotransformer. The primary of the variable layout in order to ...
Terms matched: 2  -  Score: 11  -  2,048k
Year: 2009, Volume: 9, Issue: 3
... , 2009 DC motor control is obtained with FLC. The goal of Status No designed FLC in this study is to minimize the error. Surface #1 of ... . Online fault diagnosis neuro-fuzzy schemes, evolutionary programming, expert has been studied. Design of fault diagnosis has two main levels: system, genetic algorithms, etc ...
Terms matched: 2  -  Score: 11  -  516k
Year: 2019, Volume: 19, Number: 2
... circuits that are corresponding to three position factors 4, 2 logsig function circuit is designed with input Vp and Vn. and 1, are calculated to recover the ... and In addition, the introduction of the first memristor [10], algorithm design have been researched in theory as well as in hardware implementation of FPGA platforms ...
Terms matched: 2  -  Score: 11  -  1,762k
Year: 2021, Volume: 21, Number: 1
... (xor) operation. Block cipher algorithms are usually using the S-box that he designed. preferred for the encryption of non-streaming images [2-6]. Reyad et ... set of states, V represents the output alphabet, was designed. In this design, RGB PV was obtained P  i  represents the probability of being ...
Terms matched: 2  -  Score: 11  -  2,911k
Year: 2010, Volume: 10, Issue: 4
... difference was statistically significant. January 2010]. The ONZOFF control strategy has been designed to allow [13] X. Tortolero, K. Masani, C ... Department of Clinical Science and Engineering, Salisbury District Hospital, Salisbury and School of Design Engineering and Computing, Bournemouth University, Bournemouth, UK d.wood@salisburyfes.com 3 ...
Terms matched: 2  -  Score: 11  -  1,161k
Year: 2014, Volume: 14, Number: 4
... of this benchmark The output sequence y9 of successfully trained ANN is: matches the designed output yd. To accomplish successful 5 -1 0 0 0 -3 0 0 ... pp. 175-188, [18]), and d) multiband FIR filter design [19]. a) System of Linear Equations (SLE) The ...
Terms matched: 2  -  Score: 11  -  1,442k
Year: 2013, Volume: 13, Number: 4
... . (1) and eq. (2 ), taking into account the designed according to algorithmic constraints (fixed point parity check matrix H and the way ... parallel hardware the Gaussian wiretap channel proposed in [21]. FPGA based architecture design for the LDPC decoders. implementation for reduced code length LDPC decoders can Our ...
Terms matched: 2  -  Score: 11  -  609k
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The search engine database includes all papers published after 2007, including titles, author names, abstracts, keywords, full papers text, references and citations. For papers published between 2001 and 2006, please visit the Archive section.


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