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Year: 2019, Volume: 19, Number: 3
... and future devices, utilizing the I. INTRODUCTION ever growing complexity, would significantly speed up Embedded systems are becoming more and more development times and thus not only ... was introduced. The assumption that a variable axes. This algorithm includes six PID controllers, is always present on the same cache cell is no longer three Kalman ...
Year: 2015, Volume: 15, Number: 1
... , almost 80% capacity of BRAM data from BRAM1 at four times higher clock speed than rest remains unutilized. This inefficient BRAM utilization is a of the system ... as buffer and pre-fetch Wiatr et al [7] implemented FPGA based convolver and controller unit. Both BRAMs are working alternately for calculated that number of CLBs required ...
Year: 2017, Volume: 17, Number: 1
... Q. Xu, G. Wei, "Characteristic analysis and control for high speed proportional solenoid valve," 2013 8th IEEE Conference on Industrial Electronics and Applications ... and Implementation Details The feasibility of controlling the average current and the If a PC-based controller is used to control a PSV, the dither amplitude independently within a limited ...
Year: 2014, Volume: 14, Number: 1
... amplitude. On the other hand, FACTS devices Also, this particle has a speed as shown in (2) in the t can increase transient and small ... optimal size of the static VAr compensator Compensator (SSSC), unified power flow controller (FACTS devices) in a 30 bus IEEE test system is determined. ...
Year: 2007, Volume: 7, Issue: 1
... low on-state voltage drop and relatively high switching losses in function of the temperature. speed are obtained by the injection of minority carriers into In any particular situation, ... controlled. DC A punch-trough IGBT has an N+ buffer layer between the power controllers perform the basic function of dc-dc P+ substrate and N- drift region ...
Year: 2023, Volume: 23, Number: 4
... built upon a straightforward algorithm based on the 3rd WiMAX. A configurable architecture for High-Speed Generation Partnership Project (3GPP) Release 15 (R15) Downlink Shared Channel ... reached the row and column counters are reset. To achieve this, a memory controller module is used in the This operation enables proper read and write of the ...
Year: 2012, Volume: 12, Number: 1
... avoided state variables. complex computations based on magnetic field methods. In The angular speed of the magnetizing flux vector during [14] the area of circuit theory ... et. Al., "Identification of Synchronous Machine Parameters using Hystheresis Based Current Controller", Proc. of IECON 2006. [5] O. Makela ...
Year: 2013, Volume: 13, Number: 3
... method does. required, which represents an advantage of grey-fuzzy Therefore, the computational speed of the proposed method methods. is fast. Additionally, the proposed method ... of the ground Luo et al. [10] utilized a look-ahead fuzzy logic controller surface potential gradient to time( dV/ dt ), barometric for the ...
Year: 2013, Volume: 13, Number: 3
... is done through a high intensive use of the CPU with the reduction of boundary speed bus- Element Interconnect Bus (EIB). At a clock cells using ... in a variety of problems, core computing SIMD (SPEn), a memory controller and an such as robot guidance. In [3] and [4 ...
Year: 2010, Volume: 10, Issue: 3
... the presentation of the proposed robot alignment design and functional constraints, such as the speed of operation, accuracy, energy and cost efficiency. Moreover, the algorithm ... to a distinct input channel of the LPC2294 front-mounted ultrasound transducers, one for transmission microcontroller ADC circuit [16], including the output and the other for reception ...
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