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Search results for: frequency
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Year: 2011, Volume: 11, Number: 2
... the DFOC control system, the following hypotheses have been considered: Because K1 is a constant and then, in case of a slower r ‚ The static frequency converter (CSF) is assumed to parameter variation related to the adaptive law, we get: contain a voltage inverter. r € ki ƒ— ƒ ...
Year: 2018, Volume: 18, Number: 3
... in the hardware platforms. Performances of implementations are computer processor manufacturing, because performance compered, it is concluded that implementations that run on improvements of the CPU reached frequency limits. This two or more OpenCL devices have better performances then resulted in the change of the CPU and GPU hardware implementation presented at [12] running ...
Year: 2011, Volume: 11, Number: 2
... Fig. 7 shows the efficiency of the proposed converter versus output power. TABLE I. PROPOSED CONVERTER SPECIFICATIONS SPECIFICATIONS VALUE Input voltage 48 V Output voltage 150 V frequency 100 kHz PO 150 W Figure 5. The measured waveform of drain-source voltage and current of auxiliary switch S a1 (vertical scale 40V/div or 3A ...
Year: 2018, Volume: 18, Number: 1
... modulation index, R T and L T are the total resistance and inductance between PCC and grid TABLE II. CONTROLLER PARAMETERS respectively, and ‰ is the grid frequency. From the above set Name Kp Ki PI ID 0.4 8 of equations, GVSC controller as shown in Fig. 5 is PI IQ 0.4 8 developed ...
Year: 2017, Volume: 17, Number: 2
... the practical VNode € (14) implications of implementing the presented system requires RS € RNode // further investigation of the varying impedance characteristics of converters in the frequency domain, as REFERENCES shown in [27]. Hence, future work will also look at how the [1] X. Wang, J. ...
Year: 2014, Volume: 14, Number: 2
... i, bi) (12) relative to the number of pipeline stages. The maximum where H is the function that computes the next set of error system frequency is close to the maximum possible for the detection bits of Hamming code, i is the number of stages, appropriate FPGA model. This confirms the fulfillment ...
Year: 2013, Volume: 13, Number: 1
... -T4 V52 T6 V60 phase currents and α-β and μ1-μ2 subspace current 8S -T7 V62 -T10 V54 -T2 V52 T8 V36 trajectories are presented in Fig. 6. The frequency reference 9P -T11 V54 -T4 V52 T6 V36 T7 V32 is set to 35 Hz and PWM switching frequency is 5 kHz. Fig. 6a and Fig. ...
Year: 2020, Volume: 20, Number: 3
... filter is beneficial in real time applications for stretching that transforms the gray level x to an intensified two reasons. First, it is easy to adjust the cutoff frequency. level, and a and b are the values between 0 and 1 that decide Decreasing the value of will lower the cutoff frequency a stretching percentage ...
Year: 2012, Volume: 12, Number: 1
... W. Liu, D. Z. Ding, R. S. Chen, "Preconditioning 2.5 Matrix Interpolation Technique for Fast Analysis of Scattering Over WCIP Broad Frequency Band", IEEE Transactions on Antennas and J Wavelet Expansion [23] Propagation, vol. 58, no. 7, pp. 2484 €“ 2487 ...
Year: 2017, Volume: 17, Number: 1
... resulted layout is presented in Fig.5. We have complexity and a high throughput being an appealing obtained an area of 481,87x481,87 m at a clock frequency solution for the VLSI implementation of inverse discrete sine transform. It is also possible to further increase the of 314.96 MHz. The area figures for ASIC implementation ...
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